Design Verification(Dv) Engineers: 5+ Years

2 weeks ago


Singapore MARQUEE SEMICONDUCTOR SINGAPORE PTE. LTD. Full time

**Design Verification(DV) Engineers: 5+ years**:
**Multiple Positions**:
**Preferred Locations**:
**Singapore**:

- Location is not a limiting factor for highly self-motivated and pro-active engineers, who are passionate to build up their career with Marquee.
**- We’re looking for highly motivated, SoC Verification Engineers who are responsible to ensure Right First Time Silicon Success.

Your responsibilities will include but not be limited to:Architectural Development of Complex Pre-Silicon Verification environments for simulation and Emulation platform.
Be able to develop “C” based tests for embedded processor platforms.
Development of Verification and coverage plans.
Rigorously executing Validation Plans to ensure Right First Time Success of our Products.
Work directly with hardware architects, logic designers, IP providers, Physical implementers and Platform validators to influence overall SoC and system design.
Be able to comprehend usual service level agreement features - Power, Performance, Area and Schedule, and accordingly plan the development.

Experience in functional safety, embedded processor, power management, MRAM, coherency, security.
Knowledge of multiple Industry standard protocols -PCIe, NVMe, USB4.0, DDR, AXI, CHI, AHB, MIPI, Displayport, Ethernet
Knowledge of Clocking, Boot/Reset flows.
Experience with System Verilog/UVM SOC development environment is must
Experience with Low power/UPF verification techniques.
Strong background in scripting - PERL, TCL, Python.
Understanding of software and/or hardware validation techniques

Set aggressive goals and meet/beat the commitments.
Flexible enough to work in a dynamic environment and multitask seamlessly.
Ability to work independently and in a team
Guiding and mentoring junior engineers



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