RTL Design Verification Engineer

2 days ago


Singapore SVENTL ASIA PACIFIC PTE. LTD. Full time $80,000 - $120,000 per year
Job Description & Requirements
  • Develop verification environment and tests to perform Functional (RTL) testing at IP level and SoC Level
  • Develop IP level/SoC level test plans based on the design/architectural specs.
  • Coverage Analysis and Coding
  • Run simulations & regressions, debug test failures to identify test case issues & RTL design issues
  • Define and develop block/full chip level verification environment and its components

Required Skills:

  • 6 & above years of experience in ASIC Verification and Methodologies
  • Good knowledge of System Verilog, SV-OVM/SV-UVM Methodologies
  • Good understanding of RTL concepts
  • Good understanding of AHB/AXI protocol
  • Expertise in PCI-e/ USB/ Ethernet
  • Need Experience on protocols MAC, FEC, and Serdes
  • Knowledge of Perl/TCL is Must
  • Good communication skil

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