Senior Rtl Verification Engineer

4 days ago


Singapore SVENTL ASIA PACIFIC PTE. LTD. Full time

**Job Description & Requirements**:

- Develop verification environment and tests to perform Functional (RTL) testing at IP level and SoC Level
- Develop IP level/SoC level test plans based on the design/architectural specs.
- Coverage Analysis and Coding
- Run simulations & regressions, debug test failures to identify test case issues & RTL design issues
- Define and develop block/full chip level verification environment and its components

**Required Skills**:

- 5-9 & above years of experience in ASIC Verification and Methodologies
- Good knowledge of System Verilog, SV-OVM/SV-UVM Methodologies
- Good understanding of RTL concepts
- Good understanding of AHB/AXI protocol
- Expertise in PCI-e/ USB/ Ethernet
- Need Experience on protocols MAC, FEC, and Serdes
- Knowledge of Perl/TCL is Must
- Good communication skill



  • Singapore SVENTL ASIA PACIFIC PTE. LTD. Full time

    **Job Description & Requirements**: - Develop verification environment and tests to perform Functional (RTL) testing at IP level and SoC Level - Develop IP level/SoC level test plans based on the design/architectural specs. - Coverage Analysis and Coding - Run simulations & regressions, debug test failures to identify test case issues & RTL design issues -...


  • Singapore SVENTL ASIA PACIFIC PTE. LTD. Full time $80,000 - $120,000 per year

    Job Description & RequirementsDevelop verification environment and tests to perform Functional (RTL) testing at IP level and SoC LevelDevelop IP level/SoC level test plans based on the design/architectural specs.Coverage Analysis and CodingRun simulations & regressions, debug test failures to identify test case issues & RTL design issuesDefine and develop...


  • Singapore AAC Technologies Full time

    JOB DESCRIPTION Mixed-signal subsystem design from design implementation to final delivery for chip-level integration Perform micro-architectural studies to determine optimal hardware implementations of IP digital blocks to meet product requirements Ensure all required documentation are prepared according to the quality standards RTL logic design of modules...

  • Senior RTL Engineer

    3 days ago


    Singapore MARQUEE SEMICONDUCTOR SINGAPORE PTE. LTD. Full time $150,000 - $250,000 per year

    Experience Required : 7-12 yearsTechnical Requirements:o Strong System Verilog and Verilog coding skillso Knowledge of specific IP domains:Memory Engineers: DDR4/5 controllers, cache controllers, memory interfacesI/O Engineers: UART, SPI, I2C, GPIO, SD/MMC controllersNetwork Engineers: Ethernet MAC, network protocolsSecurity Engineers: AES, SHA, RSA, TRNG...

  • Rtl Design Engineer

    2 weeks ago


    Singapore AAC TECHNOLOGIES PTE. LTD. Full time

    JOB DESCRIPTION: - Mixed-signal subsystem design from design implementation to final delivery for chip-level integration - Perform micro-architectural studies to determine optimal hardware implementations of IP digital blocks to meet product requirements - Ensure all required documentation are prepared according to the quality standards - RTL logic design...

  • RTL Engineer

    3 days ago


    Singapore NUWAY CFR PTE. LTD. Full time $90,000 - $120,000 per year

    One of our Semiconductor IC Design company is building their design team in Singapore.Role : RTL EngineerLocation : SingaporeExperience : 3 to 7 yearsTechnical Requirements:o Advanced SystemVerilog and RTL coding skillso Expert knowledge of IP integration methodologieso Experience with ARM CPU subsystem integrationo Understanding of high-speed I/O...


  • Singapore CHIPGLOBE ASIA PACIFIC PTE. LTD. Full time

    JOB DESCRIPTION: - Perform with various activities on RTL design implementation and verification at SoC level. - Responsible for RTL coding, logical synthesis, functional test plan, test bench development, RTL and gate-level simulation/verification, code coverage, formal verification, test vector generation and design documentation. - Work and provide high...


  • Singapore OMNIVISION Full time

    Responsibilities Be in-charge of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. Conduct thorough test plan reviews systematically...


  • Singapore Realtek Full time

    Responsibilities Responsibility for test plans, testbench documentation and implementation. Use SystemVerilog language, SVA and UVM methodology for block level verification. Debug tests with design engineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes and show progress towards tape‑out. Write...


  • Singapore EXASOFT PTE. LTD. Full time $120,000 - $180,000 per year

    Responsibilities:Lead mixed-signal subsystem design from implementation through to final delivery for chip-level integration.Perform micro-architectural studies to identify and implement optimal hardware solutions for IP digital blocks in line with product requirements.Develop RTL logic modules using Verilog HDL, including (but not limited to) power and...