(Sr./Staff) DFT Engineer
4 days ago
Position Overview We are seeking a highly skilled and experienced Senior/Staff DFT (Design for Test) Engineer to join our team. In this role, you will be instrumental in defining and implementing the test strategy for our complex CIS/SoC/TDDI designs. You will take ownership of the entire DFT flow, from architecture to pattern generation, ensuring the highest quality and test coverage for our products. The ideal candidate will have a proven track record of driving DFT methodology and successfully bringing multi-million-gate designs to mass production Key Responsibilities DFT Architecture & Planning: Develop and set the advanced DFT strategy and implementation plan based on the latest methodologies and EDA tools to achieve excellent test coverage for low and zero DPPM goals. DFT Implementation & Verification: Lead the implementation of DFT structures, including SCAN (full and partial), Test Compression, Memory BIST (MBIST), Logic BIST (LBIST), Boundary Scan (BSD), and JTAG. Perform verification of DFT logic and generate production-ready ATE patterns. Pattern Generation & Silicon Debug: Be responsible for ATPG pattern generation, simulation, and validation. Support silicon bring-up, debug test patterns on the ATE, and perform failure analysis to improve yield. Timing & Constraints: Generate accurate DFT timing constraints and collaborate closely with the backend design team to achieve timing closure for all test modes. Cross-Functional Collaboration: Work effectively with front-end design, verification, physical design, and product engineering teams to ensure testability and manufacturability are integrated throughout the design cycle. Requirements Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. 5+ years of hands‐on experience in DFT for ASIC/SoC designs. Deep understanding of ASIC design flow and core DFT concepts (fault models, test coverage, etc.). Proven, hands‐on experience in DFT implementation including SCAN insertion, ATPG, test compression, MBIST, LBIST, and Boundary Scan. Proficiency with industry‐standard DFT tools from Synopsys (DFT Compiler, TetraMAX/ TestMAX) and/or Mentor Graphics/Siemens (Tessent platform). Experience with scripting languages for automation, such as Perl, TCL, or Python. A history of successful DFT execution on at least one complex, multi‐million‐gate product that reached mass production, preferably at 40nm technology node or below. Strong problem‐solving skills, self‐motivation, and excellent communication abilities for effective cross‐department collaboration. Professional fluency in Mandarin is required due to the need to liaise with Mandarin‐speaking stakeholders and team members based in China. This is essential for effective communication in meetings, documentation, and day‐to‐day operations. Preferred Qualifications Knowledge of design synthesis and Static Timing Analysis (STA). Experience with low‐power DFT techniques and related challenges. Familiarity with backend design flows and timing closure challenges is a significant plus. #J-18808-Ljbffr
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Staff Engineer, Dft
2 weeks ago
Singapore AMBIQ MICRO SINGAPORE PRIVATE LTD. Full time**Company Overview** Ambiq's mission is to enable intelligence everywhere by delivering the lowest power semiconductor solutions. Ambiq is a pioneer and a leading provider of ultra-low-power semiconductor solutions based on our proprietary and patented sub - and near-threshold technologies. With increased power requirements of artificial intelligence (AI)...
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Senior Staff Engineer, Dft
18 minutes ago
Singapore AMBIQ MICRO SINGAPORE PRIVATE LTD. Full time**Specific Responsibilities** - Responsible for scan insertion, boundary scan, MBIST, ATPG for ultra-low power SoC based on subthreshold operation using standard EDA tools. - Develop and implement low-power DFT architecture and infrastructure. - Generate structural test vectors, analyze and improve coverage, test time and test cost. - Perform pre/post-layout...
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Sr. Staff Engineer, DFT New Singapore
1 week ago
Singapore Ambiq Micro Inc Full timeAmbiq's mission is to enable intelligence everywhere by delivering the lowest power semiconductor solutions. Ambiq is a pioneer and a leading provider of ultra-low-power semiconductor solutions based on our proprietary and patented sub- and near-threshold technologies. With the increasing power requirements of artificial intelligence (AI) computing, our...
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Staff Engineer
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Singapore Infineon Technologies AG Full timeWe are in search of an Engineer who will be responsible for generating Design for Test (DFT) instruments utilizing advanced Electronic Design Automation (EDA) tools. This role will involve working with various DFT instruments, including Memory Built-In Self-Test (MBIST), On-Chip Clock Controller (OCC), Test Access Port (TAP) controller, Boundary Scan, Logic...
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Staff Engineer
4 days ago
Singapore Infineon Technologies AG Full timeWe are in search of an Engineer who will be responsible for generating Design for Test (DFT) instruments utilizing advanced Electronic Design Automation (EDA) tools. This role will involve working with various DFT instruments, including Memory Built-In Self-Test (MBIST), On-Chip Clock Controller (OCC), Test Access Port (TAP) controller, Boundary Scan, Logic...
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Senior Dft Engineer
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Singapore MDE CAPITAL CONSULTANCY PTE. LTD. Full time5 years exp **Roles & Responsibilities** Working Hours : 9AM - 6PM Working days : 5 Days Salary : 7500 - 8500 ( Depending on experience ) **Responsibilities**: - Define SoC DfT architecture and DfM concept - Implement and verify DfT measures to meet product specifications and production requirements - Work closely with cross-function teams (design,...
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DFT Engineer
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Singapore SUNLUNE (SINGAPORE) PTE. LTD. Full timeOverview We are seeking an experienced AI Chip DFT (Design for Test) Engineer to lead the design and implementation of test architectures for our advanced AI chip designs, ensuring efficient and reliable testing processes. This role involves taking ownership of integrating DFT circuits (Scan, Mbit, Memory repair, Bscan), performing comprehensive simulations,...
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DFT Engineer
11 hours ago
Singapore SUNLUNE (SINGAPORE) PTE. LTD. Full timeOverview We are seeking an experienced AI Chip DFT (Design for Test) Engineer to lead the design and implementation of test architectures for our advanced AI chip designs, ensuring efficient and reliable testing processes. This role involves taking ownership of integrating DFT circuits (Scan, Mbit, Memory repair, Bscan), performing comprehensive simulations,...
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DFT Engineer
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Singapore VOICE THE WAY PTE. LTD. Full timeJob Description Participate in the architecture and implementation of DFT (Design-For-Test) features for SoC/IP, including scan chain design, ATPG, pattern generation, simulation, and diagnosis; Perform CP (wafer-level) and FT (final test) yield analysis based on diagnosis results; Research and evaluate state-of-the-art DFT architectures and methodologies...
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Dft Design Engineer/dft设计工程师
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Singapore Qingdao Global Golden Bridge Enterprise Management Co.,LTD. Full timeDFT Design Engineer **Salary**: 20-35kRMB / month **Responsibilities**: 1. Design the DFT scheme reasonably according to the requirements; 2. Use the Mentor/Synopsys tool to insert the DFT circuit (JTAG/BSCAN/SCAN/MBIST/ LBIST, etc.); 3. Conduct relevant verification of DFT circuit (ATPG/ BIST simulation /IP verification /Formality); 4. DFT circuit timing...
