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Singapore OMNIVISION Full timeGet AI-powered advice on this job and more exclusive features. Direct message the job poster from OMNIVISION Responsibilities Responsible for implementing ISP Algorithm into hardware using Verilog, SystemVerilog, and/or SystemC (High Level Synthesis). Verify logic at ISP level and digital system level. Optimize design for reduced gate count and low...
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ISP RTL Design Manager
2 weeks ago
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(Sr.) ISP RTL Design Manager
role at
OMNIVISION .
Get AI-powered advice on this job and more exclusive features.
Responsibilities:
Implement ISP Algorithm into hardware using Verilog, SystemVerilog, and/or SystemC (High Level Synthesis).
Define ISP hardware architecture based on product features and performance requirements, including gate count and power estimation.
Verify logic at ISP level and digital system level.
Optimize design for reduced gate count and low power consumption.
Drive ISP design activities in collaboration with ISP Algorithm Team, ISP Design leaders across sites, and Digital System Design Team.
Lead, supervise, and mentor a team of RTL design engineers.
Requirements:
Minimum MSEE, BSEE, or equivalent, with 7+ years of digital design and verification experience.
3+ years of project management or people management experience.
Knowledge in CMOS Image Sensors and image signal processing (ISP).
Experience with SystemC/C++, SystemVerilog, and Catapult HLS tool.
Strong leadership and collaboration skills.
Excellent time management, communication, and interpersonal skills.
Result-oriented with adaptability to change.
Additional Details:
Seniority level: Mid-Senior level
Employment type: Full-time
Job function: Design, Art/Creative, and Information Technology
Industry: Semiconductor Manufacturing
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