(Sr./Staff) ISP RTL Design Engineer

Join to apply for the (Sr.) ISP RTL Design Manager role at OMNIVISION . Get AI-powered advice on this job and more exclusive features. Responsibilities: Implement ISP Algorithm into hardware using Verilog, SystemVerilog, and/or SystemC (High Level Synthesis). Define ISP hardware architecture based on product features and performance requirements, including...

Responsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation Verify Logic at ISP level and Digital System level Optimize Design for less gate count and low power...

Responsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis)Verify Logic at ISP level and Digital System level Optimize Design for less gate count and low power consumption Drive ISP Design activities in close collaboration with ISP Algorithm Team Requirements Minimum MSEE, or BSEE, or...

20 hours ago Be among the first 25 applicants Get AI-powered advice on this job and more exclusive features. Direct message the job poster from OMNIVISION Responsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis)Define ISP HW Architecture based on product features and performance...

Responsibilities: Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation Verify Logic at ISP level and Digital System level Optimize Design for less gate count and low...

Staff Silicon Design Engineer - RTL Integration Join AMD as a Staff Silicon Design Engineer – RTL Integration. Work on AMD's next‐generation FPGA and programmable SOC products, building full‐chip RTL connectivity models, verifying architectural intent, and developing custom tools to improve efficiency and quality. Responsibilities Develop Full‐Chip...

About the job (Sr./Staff) SoC Design Engineer Description You would be part of a dynamic digital SoC design team that develops state-of-the-art video processing, neural processing, advanced video analytics accelerators, and the entire Camera Processor SoC. You would be joining the team to explore, evaluate and define innovative design SoC architectures, to...

JOB DESCRIPTION: - Mixed-signal subsystem design from design implementation to final delivery for chip-level integration - Perform micro-architectural studies to determine optimal hardware implementations of IP digital blocks to meet product requirements - Ensure all required documentation are prepared according to the quality standards - RTL logic design...

**Job description**: - Lead and contribute to the micro-architecture definition and RTL implementation of complex digital blocks within the SoC. - Take a leading role in the RTL integration of major SoC subsystems, including but not limited to PCIe, CXL, and/or Coherent and Non-coherent Network-on-Chip (NoC) fabrics. - Translate high-level specifications...

**Company Overview** We are seeking a talented RTL Engineer to join our team in Singapore. As an RTL Engineer, you'll ensure the highest quality products by developing and implementing robust methodologies. Work alongside a talented team of engineers to deliver innovative solutions that meet the evolving needs of our customers. **Responsibilities** - Own...