Senior RTL Design Engineer

In this role you will be part of a world-class IC design team responsible for the development and deployment of software solutions for a revolutionary computing system, which will reduce the energy consumption of AI processing by two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our...

Roles & ResponsibilitiesJOB DESCRIPTION :• Mixed-signal subsystem design from design implementation to final delivery for chip-level integration• Perform micro-architectural studies to determine optimal hardware implementations of IP digital blocks to meet product requirements• Ensure all required documentation are prepared according to the quality...

Roles & ResponsibilitiesOur client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Product Development (PD) team which will be working on projects. Lead RTL Design Engineer (Senior Staff Engineer level)ResponsibilitiesOwn and be responsible for pre-tape out quality for...

Job Responsibilities: Perform IC design development of SerDes IP products Perform Logic Synthesis, Static Timing Analysis Lead DFT related activities - Scan Insertion, ATPG, Pattern Validation Work with Physical designer and RTL designer to achieve timing closure Work with test team in debugging production test issues Help debug & correct any functional...

Job Responsibilities: Perform IC design development of SerDes IP products Perform Logic Synthesis, Static Timing Analysis Lead DFT related activities - Scan Insertion, ATPG, Pattern Validation Work with Physical designer and RTL designer to achieve timing closure Work with test team in debugging production test issues Help debug & correct any...

Responsibilities:Contribute to IP selection and architecture definition; create functional specifications.Perform PPA evaluation and optimization.Develop RTL for functional blocks/units with architectural features and timing constraints, targeting synthesis and APRSupport debugging across RTL simulation, gate-level, and post-layout simulations.Conduct...

Get AI-powered advice on this job and more exclusive features. Direct message the job poster from OMNIVISION Responsibilities Responsible for implementing ISP Algorithm into hardware using Verilog, SystemVerilog, and/or SystemC (High Level Synthesis). Verify logic at ISP level and digital system level. Optimize design for reduced gate count and low power...

One of our Semiconductor IC Design company is building their design team in Singapore.Role : RTL EngineerLocation : SingaporeExperience : 3 to 7 yearsTechnical Requirements:o Advanced SystemVerilog and RTL coding skillso Expert knowledge of IP integration methodologieso Experience with ARM CPU subsystem integrationo Understanding of high-speed I/O...

Job Description & RequirementsDevelop verification environment and tests to perform Functional (RTL) testing at IP level and SoC LevelDevelop IP level/SoC level test plans based on the design/architectural specs.Coverage Analysis and CodingRun simulations & regressions, debug test failures to identify test case issues & RTL design issuesDefine and develop...

Join to apply for the (Sr.) ISP RTL Design Manager role at OMNIVISION . Get AI-powered advice on this job and more exclusive features. Responsibilities: Implement ISP Algorithm into hardware using Verilog, SystemVerilog, and/or SystemC (High Level Synthesis). Define ISP hardware architecture based on product features and performance requirements, including...