ASIC RTL Design Engineer

7 days ago


Singapore TETRAMEM SINGAPORE PTE. LTD. Full time $150,000 - $250,000 per year

In this role you will be part of a world-class IC design team responsible for the development and deployment of software solutions for a revolutionary computing system, which will reduce the energy consumption of AI processing by two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our unique computing memory device with multi-bit-level capacity per cell, which is non-volatile with excellent retention and endurance. We offer a very competitive compensation, commensurate with experience, and a full benefits package including insurance, paid time off, and more.

Multiple job openings including Engineer, Senior Engineer, Staff Engineer, Senior Staff Engineer, Principal Engineer, Senior Principal Engineer, etc. position levels and salary are determined by background and experience.

Responsibilities:

  • Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring robust and efficient designs.
  • Integrate and validate IP blocks within the larger system, ensuring seamless functionality and compatibility.
  • Thoroughly comprehend both internal and external requirements, conducting Power, Performance, and Area (PPA) analysis to optimize design trade-offs.
  • Collaborate closely with the backend team, participating in RTL coding, implementation, and synthesis stages to ensure successful tape out.
  • Develop and maintain reusable internal intellectual properties (IPs) tailored for AI and/or in-memory computing applications.
  • Provide crucial support for post-silicon testing and validation, diagnosing and rectifying issues to ensure the overall functionality and quality of the product.
  • Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best practices to foster their professional growth.
  • Contribute to design reviews and cross-functional discussions, offering insights and recommendations to enhance product performance and reliability.
  • Stay up to date with industry trends and advancements in RTL design methodologies, integrating innovative techniques to improve product quality and efficiency.
    Collaborate with cross-functional teams, including software, architecture, and verification teams, to achieve cohesive and successful product development and delivery.

Requirements:

  • MS with 4+ years of experience or PhD in Electrical Engineering with emphasis on RTL/SoC/digital design
  • Experience with Verilog and system Verilog
  • Experience with VCS, Verdi or other industry standard tools
  • Experience with pre-layout simulation and post-layout simulation
  • Understanding of the design flow. Ability to work with the backend team
  • Familiarity with AMBA APB AXI Protocol
  • Familiarity with RISC/Arm or other core architectures
  • Ability to create innovative architecture and solutions to customer requirements
    Ability to work in startup environment and work both independently and as a team player, with the ability to provide technical leadership to other members of the engineering team.

Experience in one or more of the following areas considered a strong plus:

  • FPGA/ASIC design of image processing systems
  • Working knowledge of SoC architecture such as CPU, GPU or accelerators
  • Familiarity with: UVM, place-and-route, STA, EM/IR/Power


  • Singapore SVENTL ASIA PACIFIC PTE. LTD. Full time $80,000 - $120,000 per year

    Job Description & RequirementsDevelop verification environment and tests to perform Functional (RTL) testing at IP level and SoC LevelDevelop IP level/SoC level test plans based on the design/architectural specs.Coverage Analysis and CodingRun simulations & regressions, debug test failures to identify test case issues & RTL design issuesDefine and develop...


  • Singapore CANAAN CREATIVE GLOBAL PTE. LTD. Full time

    Responsibilities: Contribute to IP selection and architecture definition; create functional specifications. Perform PPA evaluation and optimization. Develop RTL for functional blocks/units with architectural features and timing constraints, targeting synthesis and APR Support debugging across RTL simulation, gate-level, and post-layout simulations. Conduct...

  • Asic Engineer

    2 weeks ago


    Singapore Micron Full time

    **Our vision is to transform how the world uses information to enrich life for all. **Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it...


  • Singapore Spicules Technologies LLP. Full time

    You are a dynamic and experienced Director needed to lead the ASIC/SoC Division at ATRI Solutions in India, based in Ahmedabad or Pune. Reporting to the VP of Engineering, you will strategically and operationally oversee building and scaling engineering teams, delivering pre- and post-silicon services, and cultivating ecosystem partnerships with top silicon...


  • Singapore Canaan Creative Global Pte. Ltd. Full time $120,000 - $180,000 per year

    Responsibilities:Contribute to IP selection and architecture definition; create functional specifications.Perform PPA evaluation and optimization.Develop RTL for functional blocks/units with architectural features and timing constraints, targeting synthesis and APRSupport debugging across RTL simulation, gate-level, and post-layout simulations.Conduct...

  • RTL Design Engineer

    4 weeks ago


    Singapore AAC TECHNOLOGIES PTE. LTD. Full time

    Roles & ResponsibilitiesJOB DESCRIPTION :• Mixed-signal subsystem design from design implementation to final delivery for chip-level integration• Perform micro-architectural studies to determine optimal hardware implementations of IP digital blocks to meet product requirements• Ensure all required documentation are prepared according to the quality...


  • Singapore REALTEK SINGAPORE PRIVATE LIMITED Full time

    JOB DESCRIPTION Discussion with system engineers on SoC architecture and feedback on optimization. Work on SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc; Discussion with synthesis engineer and back-end engineer on design optimization.    SoC DFT support; SoC verification plan and...

  • RTL Designer

    3 days ago


    Singapore CURIOUS TEK PTE. LTD. Full time

    Job Responsibilities: Perform IC design development of SerDes IP products Perform Logic Synthesis, Static Timing Analysis Lead DFT related activities - Scan Insertion, ATPG, Pattern Validation Work with Physical designer and RTL designer to achieve timing closure Work with test team in debugging production test issues Help debug & correct any functional...


  • Singapore REALTEK SINGAPORE PRIVATE LIMITED Full time

    JOB DESCRIPTION • Discussion with system engineers on SoC architecture and feedback on optimization.• Work on SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc;• Discussion with synthesis engineer and back-end engineer on design optimization.• SoC DFT support;• SoC...


  • Singapore REALTEK SINGAPORE PRIVATE LIMITED Full time

    JOB DESCRIPTION · Work on SoC architecture discussion and optimization with architect; SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc; · Work on SoC floorplan with architect and APR; SoC power check; SoC timing constraints and review support; SoC DFT support; SoC verification plan...