Digital Hardware Architect Specialist

2 weeks ago

Singapore beBeeDesignLead Full time $90,000 - $120,000
Senior Design Lead

As a Senior Design Lead, you will be responsible for implementing ISP algorithms into hardware using Verilog, SystemVerilog, and/or SystemC (High Level Synthesis). You will also define ISP hardware architecture based on product features and performance requirements, including gate count and power estimation.

Key responsibilities include:

  • Implementing ISP algorithms into hardware using Verilog, SystemVerilog, and/or SystemC (High Level Synthesis)
  • Defining ISP hardware architecture based on product features and performance requirements, including gate count and power estimation
  • Verifying logic at ISP level and digital system level
  • Optimizing design for reduced gate count and low power consumption

You will drive ISP design activities in collaboration with the ISP Algorithm Team, ISP Design leaders across sites, and Digital System Design Team. Additionally, you will lead, supervise, and mentor a team of RTL design engineers.

Requirements for this position include:

  • Minimum MSEE, BSEE, or equivalent, with 7+ years of digital design and verification experience
  • 3+ years of project management or people management experience
  • Knowledge in CMOS Image Sensors and image signal processing (ISP)
  • Experience with SystemC/C++, SystemVerilog, and Catapult HLS tool
  • Strong leadership and collaboration skills
  • Excellent time management, communication, and interpersonal skills
  • Result-oriented with adaptability to change

This is a mid-senior level role requiring strong technical expertise and leadership skills. If you are a results-driven professional looking for a challenging opportunity, we encourage you to apply.

Employment type: Full-time Job function: Design, Art/Creative, and Information Technology Industry: Semiconductor Manufacturing

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