AI Hardware Systems Architect

2 days ago

Singapore beBeeArchitecture Full time $120,000 - $180,000
Senior AI Chip Architect

We are seeking an experienced and highly skilled Senior AI Chip Architect to lead the development and optimization of cutting-edge AI chip hardware systems.

This role requires a strategic thinker with at least 8 years of experience in digital circuit design or chip architecture engineering.

  • Key Responsibilities:
  • AI Chip Architecture Design:Lead the design and development of advanced AI chip architectures to meet performance, power, and efficiency targets.Define system requirements and architecture strategies for AI accelerators and compute engines.
  • Performance Optimization:Drive optimization efforts at multiple levels:Algorithm Level: Refine computational algorithms to maximize performance.Architecture Level: Innovate on architecture solutions for scalability and efficiency.Circuit Level: Enhance electrical performance and address signal integrity issues.
  • Simulator Development:Develop, implement, and refine AI chip simulators using tools like GEM5 or custom frameworks.Analyze simulator outputs and apply insights to architectural decisions.
  • Technical Leadership:Mentor and guide junior engineers and collaborate cross-functionally with hardware, software, and R&D teams.Stay updated with emerging technologies and industry trends to drive innovation.
  • Front-End Development:Write, test, and optimize RTL and front-end design code to ensure robust chip functionality and performance.

Qualifications:

  • Education:Bachelor's, Master's, or Ph.D. in Computer Science, Electrical/Electronics Engineering, or a related field.
  • Experience:8+ years of hands-on experience in digital circuit design, chip architecture engineering, or AI hardware development.Proven track record in leading complex architecture design projects and delivering successful chip products.
  • Technical Expertise:Deep understanding of computer architecture and AI hardware accelerators (e.g., GPUs, TPUs).Expertise in memory systems, interconnect design, and optimization of memory access patterns for AI models.Proficiency in simulation tools (e.g., GEM5) and front-end design languages (e.g., Verilog, VHDL, SystemVerilog).Strong problem-solving skills with a focus on performance, power, and area (PPA) trade-offs.

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