Principal Engineer, Rtl Design

In this role you will be part of a world-class IC design team responsible for the development and deployment of software solutions for a revolutionary computing system, which will reduce the energy consumption of AI processing by two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our...

In this role you will be part of a world-class IC design team responsible for the development and deployment of software solutions for a revolutionary computing system, which will reduce the energy consumption of AI processing by two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our...

A leading semiconductor company in Singapore is seeking a Senior Principal SOC Design Engineer. In this role, you will lead pre-silicon RTL coding and microarchitecture definition for complex System on Chips. The ideal candidate has over 15 years of experience in electronics engineering, is an expert in VHDL and Verilog, and possesses strong team...

Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Product Development (PD) team which will be working on projects. **RTL Lead Engineer **Responsibilities**: We are seeking a talented RTL Engineer to join our team in Singapore. As an RTL Engineer, you'll...

Senior Principal SOC Design Engineer Posted today Job Description MaxLinear is seeking a Senior Principal SOC Design Engineer to join our VLSI group. You will be responsible for pre‑silicon RTL coding of blocks, subsystems, and top‑level SOC integration. With deep understanding of design architecture and meticulous attention to detail, you will develop...

Responsibilities Lead RTL design, simulation, and verification for company ASIC/SoC products, ensuring robustness. Integrate and validate IP blocks for seamless system functionality. Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs. Collaborate with backend team in RTL coding, implementation, and synthesis for...

**Responsibilities**: - Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring robust and efficient designs. - Integrate and validate IP blocks within the larger system, ensuring seamless functionality and compatibility. - Thoroughly comprehend both internal and external requirements, conducting Power, Performance,...

Responsibilities: Contribute to IP selection and architecture definition; create functional specifications. Perform PPA evaluation and optimization. Develop RTL for functional blocks/units with architectural features and timing constraints, targeting synthesis and APR Support debugging across RTL simulation, gate-level, and post-layout simulations. Conduct...

Responsibilities: Contribute to IP selection and architecture definition; create functional specifications. Perform PPA evaluation and optimization. Develop RTL for functional blocks/units with architectural features and timing constraints, targeting synthesis and APR Support debugging across RTL simulation, gate-level, and post-layout simulations. Conduct...

**Responsibilities**: - Perform IC design development of SerDes IP products - Perform Logic Synthesis, Static Timing Analysis - Lead DFT related activities - Scan Insertion, ATPG, Pattern Validation - Work with Physical designer and RTL designer to achieve timing closure - Work with test team in debugging production test issues - Help debug & correct any...