Senior Principal SOC Design Engineer

5 days ago


Singapore Maxlinear (Singapore) Pte. Ltd Full time

Senior Principal SOC Design Engineer Posted today Job Description MaxLinear is seeking a Senior Principal SOC Design Engineer to join our VLSI group. You will be responsible for pre‑silicon RTL coding of blocks, subsystems, and top‑level SOC integration. With deep understanding of design architecture and meticulous attention to detail, you will develop robust and reusable code, ensuring that VHDL or Verilog implementations enable readiness for verification, synthesis, DfT, and low‑power insertion. Responsibilities Lead the microarchitecture definition for whole System on Chips and complex IPs in close collaboration with the architecture team. Lead front‑end design activities for the integration of complex System on Chips. Ensure area, performance and power targets are reached by defining best‑in‑class architectures and methodologies. Own pre‑silicon RTL coding of blocks, IPs, and top‑level SOC integration. Develop reusable RTL code using generic and modular coding style. Contribute to verification plan from specification and in coordination with architects. Collaborate with VLSI leads on timing constraints, testability, and insertion of low‑power structures such as power gating and isolation. Own linting, CDC, RDC and collaborate with verification and physical design teams. Contribute to methodology flow updates and improvements. Qualifications Bachelor’s or Master’s degree in Electronics Engineering with 15+ years of experience. Expert in VHDL and Verilog coding, front‑end design using best‑in‑class methodology and micro‑architecture. Experience developing multi‑million gate IP and integrating heterogeneous complex SoC, including analog and mixed‑signal IP. Deep experience driving SOC and IP micro‑architecture specification. Familiar with hardware‑software partitioning, multi‑CPU and multi‑core architecture. Deep knowledge of NoC and multilayer interconnect systems. Solid knowledge of DfT concepts, physical and timing constraints. Strong verification skills: problem solving, constrained random testing, debugging. Expertise with linting tools and static code checkers such as Spyglass, Real Intent. Expertise in IP‑XACT, connectivity checks, register interfaces, and RTL assembly tools. Experience with ARM ecosystem, SERDES, UART, I2C, SPI, power‑management is a plus. Experience in Wi‑Fi, DOCSIS, Ethernet, DSP, DDR is a plus. Strong team player and communicator. Company Overview MaxLinear is a global, NASDAQ‑traded, fabless system‑on‑chip company. We innovate in radio‑frequency, analog, digital and mixed‑signal semiconductor solutions to improve communication networks worldwide. Our globally distributed teams span Singapore, Spain, India, Germany, Israel and the United States. #J-18808-Ljbffr



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    A leading semiconductor company in Singapore is seeking a Senior Principal SOC Design Engineer. In this role, you will lead pre-silicon RTL coding and microarchitecture definition for complex System on Chips. The ideal candidate has over 15 years of experience in electronics engineering, is an expert in VHDL and Verilog, and possesses strong team...


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