Dft Design Engineer/dft设计工程师

Roles & ResponsibilitiesJob Overview: We are seeking an experienced AI Chip DFT (Design for Test) Engineer to lead the design and implementation of test architectures for our advanced AI chip designs, ensuring efficient and reliable testing processes. This role involves taking ownership of integrating DFT circuits (Scan, Mbit, Memory repair, Bscan),...

**Responsibilities**: - Implement DFT including: at-speed scan, LBIST, MBIST, JTAG, self-test, and IP integration - Work closely with synthesis, static timing, and layout engineers to optimize DFT circuits. - Generate and verify Test vectors before chip tapeout. - Support test vector bring up and debug on ATE. - Support silicon failure analysis,...

**Key Responsibilities**: - Work closely with design team and make sure DFT structures are correctly inserted. - Responsible for developing, implementing and verifying DFT schemes on hard-IPs in FPGAs. - Responsible for developing and implementing techniques to test digital logic, using Scan Compression, Stuck-at, Transition and Path-Delay fault model -...

Participate in the architecture and implementation of DFT (Design-For-Test) features for SoC/IP, including scan chain design, ATPG, pattern generation, simulation, and diagnosis - Perform CP (wafer-level) and FT (final test) yield analysis based on diagnosis results - Research and evaluate state-of-the-art DFT architectures and methodologies for SoC/IP...

**Design-for-Test (DFT) Engineer - Singapore** - Singapore Regular - R&D - Hardware Job ID: A121322 **Responsibilities** Team Introduction The Silicon Platform Team acts as the core R&D middleware group for chip development within the company. The team covers the full spectrum of the chip design flow, including Logic Synthesis, Design for Testability...

**Responsibilities / 岗位职责**: - Responsible for the architecture design and R&D of the company’s core platform services using **Rust**.使用 **Rust**语言负责公司核心平台服务的架构设计与研发工作。 - Continuously deliver reliable, efficient, and cost-effective data services that create business

Overview We are seeking an experienced AI Chip DFT (Design for Test) Engineer to lead the design and implementation of test architectures for our advanced AI chip designs, ensuring efficient and reliable testing processes. This role involves taking ownership of integrating DFT circuits (Scan, Mbit, Memory repair, Bscan), performing comprehensive...

**Company Overview** Ambiq's mission is to enable intelligence everywhere by delivering the lowest power semiconductor solutions. Ambiq is a pioneer and a leading provider of ultra-low-power semiconductor solutions based on our proprietary and patented sub - and near-threshold technologies. With increased power requirements of artificial intelligence (AI)...

About Bitdeer: Bitdeer Technologies Group (Nasdaq: BTDR) is a world-leading technology company for Bitcoin mining. Bitdeer is committed to providing comprehensive computing solutions for its customers. The Company handles complex processes involved in computing such as equipment procurement, transport logistics, datacenter design and construction, equipment...

Responsibilities Responsible for DFT-related work in SoC chips, including Scan, MBIST, ATPG, Boundary Scan, IP test etc. Collaborate closely with STA, physical design, and power engineers to debug and resolve DFT-related Timing/Power-IR problems. Work in partnership with test engineers to bring up test vectors on silicon and ensure successful testing. ...