
[OSAT] Yield
6 hours ago
Responsible for driving process integration and yield improvement in wafer bumping operations. This role collaborates cross-functionally to resolve process issues, execute improvement initiatives, and support product transitions from NPI to mass production.
Key Responsibilities:
Troubleshoot bumping process (Dry & Wet) issues via DOE
Analyze yield data and detect trends
Lead continuous improvement and device qualification projects using APQP
Execute cost and yield improvement programs (CIP)
Optimize SPC limits to maintain process control
Handle customer spec reviews and technical inquiries
Coordinate BKM (Best Known Method) exercises initiated by customers
Ideal Requirements:
Degree in Engineering
3+ years of experience in semiconductor process integration or yield engineering
Hands-on experience in bumping or front-end wafer fab processes
Skilled in data analysis, SPC, and APQP methodologies
Strong analytical, coordination, and problem-solving abilities
If you would like to be considered for this opportunity, please forward a copy of your full CV to
Data provided is for recruitment purposes only. Only shortlisted candidates will be notified.
Business Registration Number : D | Licence Number : 10C5117 | EA Registration Number: R
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(OSAT) Yield & Process Integration Senior Engineer
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