Senior ISP Architecture Lead
2 weeks ago
The role of ISP Design Manager is crucial in the development of cutting-edge image signal processing technology. As an expert in this field, you will be responsible for overseeing the design and implementation of innovative ISP solutions.
In this position, you will lead a team of skilled engineers to develop hardware architecture based on product features and performance requirements. Your expertise in Verilog, SystemVerilog, and/or SystemC (High-Level Synthesis) will be essential in implementing ISP algorithms into hardware.
To ensure successful project outcomes, you will collaborate with cross-functional teams, including the ISP Algorithm Team, Digital System Design Team, and other stakeholders. Your excellent leadership and collaboration skills will enable you to drive design activities effectively.
A strong understanding of CMOS Image Sensors and image signal processing is necessary to excel in this role. Your experience with SystemC/C++, SystemVerilog, and Catapult HLS tool will also be valuable assets.
As a senior professional, you will have a minimum of 7 years of digital design and verification experience, along with 3+ years of project management or people management experience. Your result-oriented approach and adaptability to change will make you an ideal candidate for this position.
If you are passionate about developing innovative ISP solutions and leading high-performing teams, we encourage you to apply for this exciting opportunity.
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Senior ISP Design Lead
1 week ago
Singapore beBeeManager Full timeISP Design Manager Job Description As a seasoned ISP Design Manager, you will lead a team of talented engineers in designing and implementing cutting-edge Image Signal Processing (ISP) solutions. Your expertise in high-level synthesis, SystemC, SystemVerilog, and Catapult HLS tools will drive the development of innovative hardware architectures that meet our...
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Senior ISP Design Lead
2 weeks ago
Singapore beBeeManager Full timeISP Design Manager Job Description As a seasoned ISP Design Manager, you will lead a team of talented engineers in designing and implementing cutting-edge Image Signal Processing (ISP) solutions. Your expertise in high-level synthesis, SystemC, SystemVerilog, and Catapult HLS tools will drive the development of innovative hardware architectures that meet our...
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(Sr.) ISP RTL Design Manager
1 week ago
Singapore OMNIVISION Full time20 hours ago Be among the first 25 applicants Get AI-powered advice on this job and more exclusive features. Direct message the job poster from OMNIVISION Responsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis)Define ISP HW Architecture based on product features and performance...
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ISP RTL Design Engineer
2 weeks ago
Singapore OMNIVISION Full time1 week ago Be among the first 25 applicants Get AI-powered advice on this job and more exclusive features. Direct message the job poster from OMNIVISION Responsibilities Implement ISP Algorithm into hardware using Verilog, SystemVerilog, and/or SystemC (High Level Synthesis). Define ISP hardware architecture based on product features, performance...
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(Sr.) ISP RTL Design Manager
3 days ago
Singapore OMNIVISION TECHNOLOGIES SINGAPORE PTE. LTD. Full timeResponsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis)Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation Verify Logic at ISP level and Digital System level Optimize Design for less gate count and low power...
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ISP RTL Design Engineer
2 weeks ago
Singapore OMNIVISION TECHNOLOGIES SINGAPORE PTE. LTD. Full timeResponsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation Verify Logic at ISP level and Digital System level Optimize Design for less gate count and low...
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(Sr./Staff) ISP RTL Design Engineer
1 week ago
Singapore OMNIVISION Full time1 week ago Be among the first 25 applicants Get AI-powered advice on this job and more exclusive features. Direct message the job poster from OMNIVISION Responsibilities Implement ISP Algorithm into hardware using Verilog, SystemVerilog, and/or SystemC (High Level Synthesis). Define ISP hardware architecture based on product features, performance...
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(Sr./Staff) ISP RTL Design Engineer
1 week ago
Singapore OMNIVISION TECHNOLOGIES SINGAPORE PTE. LTD. Full timeResponsibilities Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation Verify Logic at ISP level and Digital System level Optimize Design for less gate count and low...
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Architectural Executive
3 days ago
Singapore KAIZEN ARCHITECTURE Full time**Key Responsibilities**: - Lead and manage architectural projects, ensuring they meet client specifications, budget constraints, and regulatory requirements. - Develop and implement strategic plans for architectural projects, including timelines, budgets, and resource allocation. - Collaborate with clients, stakeholders, and team members to define project...
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Architectural Designer
5 days ago
Singapore KAIZEN ARCHITECTURE Full time**Architectural Designer** **Key Responsibilities**: - Lead and oversee architectural/ interior architectural projects from concept to execution, ensuring quality and compliance with design brief and technical regulations - Collaborate with clients, consultants, specialists and internal teams to develop design solutions to meet with design briefs. - Manage...
