ISP RTL Design Engineer

Roles & ResponsibilitiesResponsibilitiesResponsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation Verify Logic at ISP level and Digital System level Optimize Design for...

Roles & ResponsibilitiesResponsibilitiesResponsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation Verify Logic at ISP level and Digital System level Optimize Design for...

**Responsibilities**: - Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) - Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation - Verify Logic at ISP level and Digital System level - Optimize Design for less gate count...

Roles & ResponsibilitiesResponsibilities:Lead RTL design, simulation, and verification for company ASIC/SoC products, ensuring robustness. Integrate and validate IP blocks for seamless system functionality. Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs. Collaborate with backend team in RTL coding,...

**Responsibilities**: - Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) - Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimation - Verify Logic at ISP level and Digital System level - Optimize Design for less gate count...

Roles & ResponsibilitiesResponsibilities Develop design requirements for an NPU based on system-level specifications. Being part of modelling the performance of the NPU module and its data transaction throughput. Microarchitecture design and RTL coding using Verilog / System Verilog HDL for various sub-blocks of the NPU. Understanding the mathematics of...

**Responsibilities**: - Draw, update, and maintain designs - Manage multiple complex projects at the same time - Ensure our designs meet manufacturing, technical and customer Responsibilities - Ensure that all design projects are completed within budget and time **Qualifications**: - Bachelor's Degree or equivalent experience in Mechanical Engineering or...

Roles & ResponsibilitiesResponsibilities: Develop design requirements for an NPU based on system-level specifications. Being part of modelling the performance of the NPU module and its data transaction throughput. Microarchitecture design and RTL coding using Verilog / System Verilog HDL for various sub-blocks of the NPU. Understanding the mathematics of...

Roles & ResponsibilitiesAs a Design Verification Manager, you are expected to carry out the following responsibilities.Be in-charge of a passionate verification team that is constantly pushing the limits Developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system...

Roles & ResponsibilitiesAs a Design Verification Manager, you are expected to carry out the following responsibilities.Be in-charge of a passionate verification team that is constantly pushing the limits. Developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system...