SOC Verification Intern – SoC/ASIC Design

6 days ago


Singapore TURBONEXT LTD. Full time
Roles & Responsibilities

Job Description:

We are looking for a motivated and detail-oriented SOC Verification Internto join our SoC/ASIC design team. This internship is a great opportunity for students passionate about hardware verification, system architecture, and digital IC design to gain hands-on experience in an industrial environment.

Key Responsibilities:


• Work closely with senior verification teams to help define verification strategies and methodologies for complex SoC/ASIC designs.


• Assist in the development of UVM-based testbenches and reusable verification components.


• Perform test planning, bench development, coverage analysis, and debug with support from experienced engineers.


• Contribute to simulation, create test pattern and validation of IP/Subsys/SOC Level.


• Participate in reviews of architecture and design specifications to ensure testability and completeness.


• Participate in Hardware Accelerator platform development, such as Palladium, ZEBU, and support FPGA platform qualification.


• Support FW/SW team to use Palladium/ZEBU/HAPS platform;


• Support automation scripts and tools used in the verification flow.

Required Qualifications:


• Currently pursuing a Bachelor's, Master's, or Ph.D. in Electrical Engineering, Computer Engineering, or related field.


• Familiarity with Unix command, vim/emacs and so on;


• Solid understanding of digital logic design, computer architecture, and HDLs (Verilog/SystemVerilog).


• Familiarity with UVM or other verification methodologies is a plus.


• Experience with simulation tools (such as VCS, QuestaSim, or XRUN) is a bonus.


• Scripting knowledge (e.g., Python, Shell, or Perl) is helpful for automation.


• Strong problem-solving skills and eagerness to learn and adapt in a fast-paced environment.

Preferred Skills:


• Knowledge of SoC peripheral interface, as UART/I2C/SPI/JTAG.


• Knowledge of SoC buses like AXI/AHB/APB.


• Knowledge of CPU(ARM/RISC-V) and corresponding tool-chain experience.


• Knowledge of NPU development and verification;


• Knowledge of high speed interface protocols such as PCIe, DDR, USB and Ethernet.


• Exposure to SV-C/C++ co-simulation is a plus.


• Experience using version control tools (e.g., GIT/SVN/P4).

What You'll Gain:


• Hands-on exposure to industry-standard verification flows.


• Experience very advanced verification methodology.


• Experience how will develop so powerful AI LLM chip.


• Mentorship from very senior verification expertise from famous company.


• Opportunity to contribute to real IP, Subsys and SoC-level projects.


• A strong foundation in verification best practices and tools.

Tell employers what skills you have

Hardware
Scripting
Unix
UVM
Mentorship
IP
FPGA
VCS
SoC
Ethernet
Computer Architecture
IC
System Architecture
Electrical Engineering
Test Planning

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