Senior Staff Design Verification Engineer

Position Overview:As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits - developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification. The goal is...

Roles & ResponsibilitiesPosition Overview:As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal...

About the Team The Digital Subsystems team is responsible for the research and development of digital architectures and IPs from concept to production. We develop compute engines (AI/ML), processors (RISC-V), accelerators, peripherals and system IP. Our activities include advanced research & development, high-level modeling, architecture, RTL design,...

Job Description:Responsible for IP level and/or SOC level verification.Develop verification plan for complex digital IP from design spec, work closely with design engineers to identify important verification scenarios.Create verification environment/testbench with Bus Functional Model (BFM) using SystemVerilog, UVM and/or System C.Identify and implement...

Roles & ResponsibilitiesJob Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with...

Job DescriptionsDevelop and Review Test Plan based on IC design specificationDevelop constrained-Random verification environment for complex DUTDevelop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCsImplement coverage matrix using cover point and assertionCreate and debug tests for DUTResolve bugs with remote...

Roles & ResponsibilitiesJob Description: Responsible for IP level and/or SOC level verification. Develop verification plan for complex digital IP from design spec, work closely with design engineers to identify important verification scenarios. Create verification environment/testbench with Bus Functional Model (BFM) using SystemVerilog,...

Roles & ResponsibilitiesRole : Design Verification EngineerDuration: 12 Months (extendable /convertible to permanent )Location; SingaporeJob Description:Work as a member of a cross geographic pre_silicon verification team to verify a next generation FPGA SoC.Design, architecture team to verify micro-architecture and design across multiple platformsJob...

This will be a permanent position based in Jurong East Scope of Work Produce detailed module level and SoC level testplans Create ASIC verification environment (stimulus, checkers, assertions, monitors and scoreboards). Produce directed and constrain-random verification functional tests Run simulation using EDA tools to verify functional spec works as...

JOB DESCRIPTIONIn this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition. Develop detailed module level and SoC level testplans for all the functional features, based on the design spec.. Develop ASIC verification environment including all the respective components such as stimulus,...

Roles & ResponsibilitiesJOB DESCRIPTIONIn this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition• Develop detailed module level and SoC level testplans for all the functional features, based on the design spec.• Develop ASIC verification environment including all the respective...

In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition• Develop detailed module level and SoC level testplans for all the functional features, based on the design spec.• Develop ASIC verification environment including all the respective components such as stimulus, checkers,...

In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition • Develop detailed module level and SoC level testplans for all the functional features, based on the design spec. • Develop ASIC verification environment including all the respective components such as stimulus, checkers,...

Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.Build reusable testbench, constrained-random/directed test cases, and verification associated...

Digital IC VerificationDevelop and maintain verification environment for IP modules and SOC level using UVM methodology.Write, review and implement verification plan.Create and debug test cases.Perform code coverage analysis on IP modules and SOC level.Continuous improvement of the verification flow.Additional responsibilities:a) Any reasonable task assigned...

JOB DESCRIPTIONIn this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definitionDevelop detailed module level and SoC level testplans for all the functional features, based on the design spec.Develop ASIC verification environment including all the respective components such as stimulus,...

JOB DESCRIPTION In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition Develop detailed module level and SoC level testplans for all the functional features, based on the design spec. Develop ASIC verification environment including all the respective components such as stimulus,...

Roles & ResponsibilitiesJOB DESCRIPTIONIn this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition• Develop detailed module level and SoC level testplans for all the functional features, based on the design spec.• Develop ASIC verification environment including all the respective...

Roles & ResponsibilitiesDigital IC Verification Develop and maintain verification environment for IP modules and SOC level using UVM methodology. Write, review and implement verification plan. Create and debug test cases. Perform code coverage analysis on IP modules and SOC level. Continuous improvement of the verification flow.Additional...

Job Responsibilities:-Perform verification of modules and subsystems including digital signal processing modules, networking components (eg. packet processing/protocol accelerator modules) as well as in high speed peripheral interfaces (integration of analogue IP modules such as SerDes PHYs) for complex IC/SOCsOwn and create verification plans based on...