Design Verification Engineer

This will be a permanent position based in Jurong East Scope of Work Produce detailed module level and SoC level testplans Create ASIC verification environment (stimulus, checkers, assertions, monitors and scoreboards). Produce directed and constrain-random verification functional tests Run simulation using EDA tools to verify functional spec works as...

Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.Build reusable testbench, constrained-random/directed test cases, and verification associated...

JOB DESCRIPTIONIn this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definitionDevelop detailed module level and SoC level testplans for all the functional features, based on the design spec.Develop ASIC verification environment including all the respective components such as stimulus,...

JOB DESCRIPTION In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition Develop detailed module level and SoC level testplans for all the functional features, based on the design spec. Develop ASIC verification environment including all the respective components such as stimulus,...

Role : Design Verification EngineerDuration: 12 Months (extendable /convertible to permanent )Location Singapore Job Description:Will be working as a member of a cross geographic pre_silicon verification team to verify a next generation FPGA SoC.Will be working with design, architecture team to verify micro-architecture and design across multiple...

Roles & ResponsibilitiesJOB DESCRIPTIONIn this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition• Develop detailed module level and SoC level testplans for all the functional features, based on the design spec.• Develop ASIC verification environment including all the respective...

Roles & Responsibilities Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification. Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance. Build reusable testbench, constrained-random/directed test cases, and...

Roles & ResponsibilitiesRole : Design Verification EngineerDuration: 12 Months (extendable /convertible to permanent )Location; Singapore Job Description: Will be working as a member of a cross geographic pre_silicon verification team to verify a next generation FPGA SoC. Will be working with design, architecture team to verify micro-architecture and...

Responsibilities:Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design.Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance.Develop reusable testbenches, test cases using constrained-random and directed...

Roles & ResponsibilitiesAbout the TeamThe Digital Subsystems team is responsible for the research and development of digital architectures and IPs from concept to production. We develop compute engines (AI/ML), processors (RISC-V), accelerators, peripherals and system IP. Our activities include advanced research & development, high-level modeling,...

About the Team The Digital Subsystems team is responsible for the research and development of digital architectures and IPs from concept to production. We develop compute engines (AI/ML), processors (RISC-V), accelerators, peripherals and system IP. Our activities include advanced research & development, high-level modeling, architecture, RTL design,...

We are seeking highly skilled and motivated engineers to join our team in the growth area of Mixed-Signal/Analog IC Product Development for use in Data Center Enterprise Storage applications. In this role you will be responsible for supporting the development of the most advanced semiconductor devices to support stringent high capacity storage needs across...

Roles & ResponsibilitiesWe are seeking highly skilled and motivated engineers to join our team in the growth area of Mixed-Signal/Analog IC Product Development for use in Data Center Enterprise Storage applications. In this role you will be responsible for supporting the development of the most advanced semiconductor devices to support stringent high...

Roles & ResponsibilitiesJob Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with...

Roles & ResponsibilitiesJob Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs...

Job DescriptionsDevelop and Review Test Plan based on IC design specificationDevelop constrained-Random verification environment for complex DUTDevelop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCsImplement coverage matrix using cover point and assertionCreate and debug tests for DUTResolve bugs with remote...

Job DescriptionsDevelop and Review Test Plan based on IC design specificationDevelop constrained-Random verification environment for complex DUTDevelop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCsImplement coverage matrix using cover point and assertionCreate and debug tests for DUTResolve bugs with remote...

Roles & ResponsibilitiesJob Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCs Implement coverage matrix using cover point and assertion Create and debug tests for DUT Resolve bugs with...

Job DescriptionsDevelop and Review Test Plan based on IC design specificationDevelop constrained-Random verification environment for complex DUTDevelop/Modify Testbenches using UVM/SystemVerilog for Pre-Silion IP or SOCsImplement coverage matrix using cover point and assertionCreate and debug tests for DUTResolve bugs with remote...

JOB DESCRIPTIONIn this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition. Develop detailed module level and SoC level testplans for all the functional features, based on the design spec.. Develop ASIC verification environment including all the respective components such as stimulus,...