Spot Physical Design Lead Engineer

2 days ago

Singapore AMBIQ MICRO SINGAPORE PRIVATE LTD. Full time

**Scope
The SPOT Physical Design Lead Engineer will plan and lead physical design activities for Ambiq’s next-generation technology development. This will include both methodology development and day-to-day management of tape-outs driven by Ambiq’s Advanced Development team. They will work closely with other members of the Advanced Development team and the broader engineering community at Ambiq to develop new ultra-low power methodologies, test them out, and then deploy them in sub-threshold and near-threshold test chips at 12nm and beyond. The lead engineer will also work closely with the Engineering team to transition new methodologies to support production chip development.

**Specific Responsibilities**
- Investigate, plan, and test new physical design methodologies to enable sub-threshold and near-threshold circuits and other related low power techniques (e.g., adaptive body biasing, customized standard cells, specialized memory structures, etc.).
- Validate and refine new techniques as part of a team that is building complex test chips in advanced nodes (e.g., 12nm and beyond).
- Work with product development teams (Engineering team and Architecture and Product Planning team) to rapidly deploy newly developed techniques in products.
- Plan and lead physical design activities for test chips owned by the Advanced Development team. As part of this effort, lead a small group of internal and contract resources.
- Maintain a relationship with and collaborate with 3rd party CAD tool vendors during the development of new methodologies.

**Education and Experience**:

- 10 years of experience serving as technical lead or manager for physical design in advanced SoCs.
- A master’s degree in electrical engineering or a related field is required.
- Experience serving as physical design lead in 16nm and beyond is required.
- Experience building complex SoCs with a mix of processors, memories, and high-speed interfaces is required.
- Experience running advanced timing flows (e.g., SOCV) and power-driven PD flows (e.g., multi-domain designs with a UPF/CPF flow) is required.
- Experience developing new timing flows, custom standard cells, and power-driven PD flows is highly desirable.
- Experience managing a small group of engineers is highly desirable.
- Experience developing new technologies and transitioning those technologies to production is highly desirable.

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