Digital Verification Engineer

Digital Verification Engineer page is loaded## Digital Verification Engineerlocations: Singapore, Kallangtime type: Full timeposted on: Posted Todaytime left to apply: End Date: February 28, 2026 (30+ days left to apply)job requisition id: R Come join Analog Devices (ADI) – a place where Innovation meets Impact. For more than 55 years, Analog Devices has...

Responsibilities Define verification plans and test cases based on chip design specifications, and establish the verification environment Collaborate with chip design engineers in identifying and fixing design defects and continuously improve verification coverage Participate in gate-level simulation and formal verification Optimize tools and the...

In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition. Develop detailed module level and SoC level test plans for all the functional features, based on the design spec. Develop ASIC verification environment including all the respective components such as stimulus, checkers,...

JOB DESCRIPTION: - Perform with various activities on RTL design implementation and verification at SoC level. - Responsible for RTL coding, logical synthesis, functional test plan, test bench development, RTL and gate-level simulation/verification, code coverage, formal verification, test vector generation and design documentation. - Work and provide high...

Position Overview: As a design verification engineer, you will be part of a passionate verification team that is constantly pushing the limits – developing and deploying state‑of‑the‑art verification methodologies in ever‑increasing design complexities, from UVM, C/C++ co‑simulation, system emulation to mixed‑mode simulation & formal...

Digital IC Design Verification Perform front-end verification using UVM methodology Work with Systems and Software engineers on FPGA verification Lead DFT related activities - Scan Insertion, ATPG, Pattern Validation Work with test team in debugging production test issues Help debug & correct any functional issues found in taped-out devices Participate in...

JOB DESCRIPTION In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition.• Develop detailed module level and SoC level testplans for all the functional features, based on the design spec.• Develop ASIC verification environment including all the respective components such as...

Job Responsibilities - Responsible for setting up the verification plan - Responsible for setting up the module and SoC verification platform - Responsible for designing test cases according to the test plan - Responsible for checking the function and code coverage - Participate in FPGA prototype verification - Participate in firmware problems debug Job...

Our Purpose TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day. We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and...

JOB DESCRIPTION: Responsibility for test plans, testbench documentation and implementation. Use SystemVerilog language, SVA and UVM methodology for block level verification. Debug tests with design engineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes and show progress towards tape-out. Write scripts...