ASIC/SoC Design Verification Engineer SG

Job Description:As a senior engineer in the ASIC Design Verification team, you will be responsible for developing and implementing advanced verification methodologies for IP/SOC designs. Your primary focus will be on creating test plans, developing verification environments/testbenches, and verifying modules/IP/SOCs.Responsibilities include:1. Develop and...

**Job Description**: - Perform Unit level and SOC-Level verification of SystemVerilog IPs - Develop detailed module level and SoC level verification plans based on the design spec. - Develop directed and constrained-random ASIC verification environments. - Collaborate with digital design team to debug functional testcases and deliver functionally correct...

**Location** Singapore, Central Singapore **Job Type** Full Time **Salary** $5,000 - $9,000 Per Month **Date Posted** 1 hour ago Additional Details **Job ID** 5305 **Job Views** 1 Roles & Responsibilities - Knowledge of submicron semiconductor technology - Familiar with digital ASIC/SOC design flow from RTL to silicon characterization - Familiar...

**Responsibilities**: - Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring robust and efficient designs. - Integrate and validate IP blocks within the larger system, ensuring seamless functionality and compatibility. - Thoroughly comprehend both internal and external requirements, conducting Power, Performance,...

**Responsibilities**: - Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification - Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance - Develop reusable testbench, constrained-random/directed testcases, and...

Roles & ResponsibilitiesJob Description:We are seeking a SoC Verification Engineer to test and validate System-on-Chip (SoC) designs. You will work with cross-functional teams to ensure chip functionality through verification using UVM, SystemVerilog, Python, and other cutting-edge tools.Responsibilities:Develop verification plans for module and system-level...

Roles & Responsibilities Job Description: We are seeking a SoC Verification Engineer to test and validate System-on-Chip (SoC) designs. You will work with cross-functional teams to ensure chip functionality through verification using UVM, SystemVerilog, Python, and other cutting-edge tools. Responsibilities: Develop verification plans for module and...

Roles & ResponsibilitiesOne of our US Global Semiconductor IC design is growing their design teams in Singapore. Role : Design Verification Engineer (DV)Location : SingaporeExperience : 3 to 7 years. · Technical Requirements:o Expert-level UVM and SystemVerilog verificationo Advanced coverage-driven verification methodologieso Experience with complex SoC...

Roles & Responsibilities One of our US Global Semiconductor IC design is growing their design teams in Singapore. Role : Design Verification Engineer (DV) Location : Singapore Experience : 3 to 7 years. · Technical Requirements: o Expert-level UVM and SystemVerilog verification o Advanced coverage-driven verification methodologies o Experience...

Job TitleAs a seasoned digital verification specialist, you will be responsible for developing test plans for various IP blocks and SoC architecture.Key Responsibilities:Develop module-level and SoC-level test plans based on design specifications.Create ASIC verification environments, including stimulus, checkers, assertions, monitors, and scoreboards.Design...