Director - Nand Design Rule

**Our vision is to transform how the world uses information to enrich life for all.**

Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.

Micron has a unique opportunity for a highly experienced Design Rule leader to join our Advanced NAND Technology team. As Director - NAND EnRGe (Design Enablement. Design Rules and Generators) your primary leadership responsibility is to be a catalyst for next generation NAND design rule development

**Responsibilities include but are not limited to**:

- Lead worldwide EnRGe team to deliver high quality DR PDK and generator collateral and enable zero-error mask tape-outs
- Coordinate the work of engineers from multiple groups to develop Design Rules, Requirements, Test Structures and improve process margin for all NAND generations from early development until manufacturing ceases
- Pro-actively identify and address process issues and process windows stemming from database layout or layout techniques
- Partner with Design, Product Engineering, Process Integration, Business Units and Quality groups to optimize PPAC (Performance, Power, Area, Cost) for all Micron NAND products
- Assure that correct DRCs (Design Rule Checks) are in place
- Manage effort to build and evaluate test structures to provide data for next generation devices and quantify process margin on current devices
- Summarize sophisticated problems; drive action plan resolution taken based on findings
- Define and execute project plans including quarterly milestones and lead measures to achieve target deliverables and timelines
- Lead timely information exchange between Layout/Design, Process Integration, Product Engineering, and Advanced Mask teams
- Drive timely closure of open items through communication within PI/Layout/Design teams
- Manage reticle budgets across all NAND part types from pathfinding to HVM
- Build and maintain a culture of excellence and continual improvement

**Requirements**:

- MS/PhD in Electrical Engineering, Microelectronics, Physics or related field
- Demonstrated experience overseeing an engineering team (5+ direct reports)
- Senior level (10+ years) experience in semiconductor industry areas: Design Rules, Process Integration, Yield Enhancement, Product Engineering, Design, Test Structure Development, Unit Process Development
- Solid grasp and exposure to design layout; ability to do innovative floor plan/layout work
- Success resolving sophisticated technical issues and situations
- Ability to think and act dynamically and clearly in urgent or stressed situations
- Hands-on understanding of NAND process flow

**About Micron Technology, Inc.**

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

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