Smts Product Development Eng

Overview:
**WHAT YOU DO AT AMD CHANGES EVERYTHING**

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

**Responsibilities**:
**THE ROLE**:
SMTS Test Engineer is responsible for the test solution for a next-generation AMD Product. This position serves as the Test Engineering team's Technical Leader and go-to expert for solutions. This position requires engagement with Product, Design, Platform Engineering, Device Analysis, Foundry, Quality and Reliability Engineering to drive test and characterization plan, 1st silicon bring-up, silicon debug, attainment and optimization of yield and performance distributions, test costs and product quality for next-generation AMD products.

**THE PERSON**:
The type of person we are looking for is one with a passion towards technical development, possesses broad technical leadership, critical problem solving and troubleshooting skills. The person must be a team player and have good and effective communications to deep dive into technical discussion with other members across the globe and use data to illustrate their points.

This person is expected to be independent, self-starter, well organized and have the sense of responsibility to see projects through beginning to the end. This person is expected to be market savvy and comfortable in a multi-tasking environment.

**KEY RESPONSIBILITIES**:
Key responsibilities for this role will differ according to the product life cycle and are as below:

- New product introduction phase:

- Developing characterization and test coverage strategies/plans during pre-silicon phase
- Establishing pattern requirements and driving Design Verification deliveries during pre-silicon phase
- Executing the defined characterization and test plans on new silicon
- Delivery of optimized test and product definitions across PVT corners to meet business requirements.
- Perform new device characterization, circuit sensitivity analysis, interpret findings, guide deep-dive investigations to root-cause, and/or provide mitigation actions.
- Interface with global teams across the organization on root cause resolution for device failures.
- Foster and develop new ideas/concepts in device test/debug/DFT/DFM and follow-through to deliverable outcomes.
- Product health and cost target attainment during production phase:

- Optimize test contents to meet/exceed business goal
- Lead effort to optimize yield to meet business requirements, from Fab to Back-end-Test.

**PREFERRED EXPERIENCE**:

- At least 7 years of experience in the Semiconductor industry
- Experience must include technical and specialized knowledge in the areas below:

- Strong DFT and ATE test methodologies
- ATPG Scan pattern development, Pre-silicon simulation and debug experience
- Experience with Mentor / Synopsys / Cadence EDA
- Strong ATE & test class/method development experience with Advantest 93k and/or T2K platform preferred
- Microprocessor architecture and System-on-chip (SOC)
- Strong Python/Ruby/Java/Perl/C++ coding skills

***ACADEMIC CREDENTIALS**:

- Bachelor/Master in Electrical/Electronic Engineering

**LOCATION**:
Singapore

LI-MM1

Qualifications:

- Benefits offered are described: _AMD benefits at a glance_._