Logic Verification Engineer

Join to apply for the UAV Flight And Mission Logics Engineer role at DSO National Laboratories . Get AI-powered advice on this job and more exclusive features. Job Description DSO National Laboratories (DSO) is Singapore’s largest defence research and development (R&D) organisation, with the critical mission to develop technological solutions to sharpen...

Responsibilities Responsibility for test plans, testbench documentation and implementation. Use SystemVerilog language, SVA and UVM methodology for block level verification. Debug tests with design engineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes and show progress towards tape‑out. Write...

Overview Responsibility for test plans, testbench documentation and implementation. Use SystemVerilog language, SVA and UVM methodology for block level verification. Debug tests with design engineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes and show progress towards tape-out. Write scripts to...

JOB DESCRIPTION: Responsibility for test plans, testbench documentation and implementation. Use SystemVerilog language, SVA and UVM methodology for block level verification. Debug tests with design engineers to deliver functionally correct design blocks. Close coverage measures to identify verification holes and show progress towards tape-out. Write scripts...

Senior Technical Account Engineer (Japan) About the job Sumo Logic, Inc. empowers the people who power modern, digital business. Through its SaaS analytics platform, Sumo Logic enables customers to deliver reliable and secure cloud-native applications. Our platform observes, monitors, and secures modern digital business solutions. As a true cloud-native...

Description Responsibilities You will be responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications. Specific responsibilities include: The right candidate will be a self-starter who assumes full ownership of DV tasks and delivers...

Please Note:1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)2. If you already have a Candidate Account, please Sign-In before you apply.Job Description:Foundation IP Memory Verification Engineer We are looking for energetic and passionate design engineers to join our...

Join to apply for the Sr. Staff Engineer, Design Verification role at Ambiq 1 week ago Be among the first 25 applicants Join to apply for the Sr. Staff Engineer, Design Verification role at Ambiq Get AI-powered advice on this job and more exclusive features. Company Overview Ambiq's mission is to enable intelligence everywhere by delivering the lowest power...

We are looking for energetic and passionate design engineers to join our Central Engineering Group and be part of an elite team responsible for the development of foundation IP for AI products including memory compilers, logic cells and custom macros of all types on the bleeding edge of process technology. We have multiple positions at all experience...

Responsibilities Develop and implement comprehensive verification plans for IP and SoC levels. Architect and build reusable testbenches and verification environments using UVM (Universal Verification Methodology). Create directed and constrained-random tests to identify design bugs. Develop functional coverage and assertion checks to ensure verification...