Current jobs related to Design Verification Lead - Singapore - NUWAY CFR PTE. LTD.
-
Design Verification Manager
2 weeks ago
Singapore OMNIVISION TECHNOLOGIES SINGAPORE PTE. LTD. Full timeAs a Design Verification Manager, you are expected to carry out the following responsibilities. Be in-charge of a passionate verification team that is constantly pushing the limits Developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode...
-
Design Verification Engineer
2 weeks ago
Singapore NUWAY CFR PTE. LTD. Full timeOne of our US Global Semiconductor IC design is growing their design teams in Singapore. Role : Design Verification Engineer (DV)Location : SingaporeExperience : 3 to 7 years. • Technical Requirements: o Expert-level UVM and SystemVerilog verificationo Advanced coverage-driven verification methodologieso Experience with complex SoC verification strategieso...
-
Staff Engineer, Design Verification
7 days ago
Singapore Ambiq Micro Inc Full timeDescription Responsibilities You will be responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications. Specific responsibilities include: The right candidate will be a self-starter who assumes full ownership of DV tasks and delivers...
-
Sr/ IC Design Engineer
4 days ago
Singapore ETHOS SEARCH ASSOCIATES PTE. LTD. Full timeJob Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance Implement coverage matrix using cover point and assertion Create and debug tests...
-
Sr/ IC Design Engineer
2 weeks ago
Singapore ETHOS TECH ONE PTE. LTD. Full timeOverview Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance Implement coverage matrix using cover point and assertion Create and debug tests for DUT...
-
Engineer / Senior Engineer (Design Verification)
2 weeks ago
Singapore 聯發科技 Full time $120,000 - $180,000 per year[What you will do] • Module/IP/SOC design verification. • Develop and review test plans. • Develop verification environment/testbench in Module/IP/SOC level. • Develop verification IP and reference model. • Implement test with randomization-based coverage driven verification methodology. • Implement functional and functional/code coverage...
-
Sr. Staff Engineer, Design Verification
5 days ago
Singapore Ambiq Full timeJoin to apply for the Sr. Staff Engineer, Design Verification role at Ambiq 1 week ago Be among the first 25 applicants Join to apply for the Sr. Staff Engineer, Design Verification role at Ambiq Get AI-powered advice on this job and more exclusive features. Company Overview Ambiq's mission is to enable intelligence everywhere by delivering the lowest power...
-
Sr/ IC Design Engineer
1 week ago
Singapore ETHOS SEARCH ASSOCIATES PTE. LTD. Full timeJob Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance Implement coverage matrix using cover point and assertion Create and debug...
-
Senior Engineer, Design Verification
2 weeks ago
Singapore Marvell Full timeAbout Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire...
-
Sr. Staff Engineer, Design Verification
1 day ago
Singapore Ambiq Full time**Company Overview**: **Staff Engineer - Design Verification** **Responsibilities**: **Specific Responsibilities**: - Must have participated in all phases of chip development, from creating test plans, creating testbench environment (SV/UVM), integrate VIP's, automate test env for randomized testing and score boarding. - Utilize UVM to create drivers,...

Design Verification Lead
2 weeks ago
Role : Design Verification Lead (DV)
Location : Singapore
Experience : 10+ years
• Technical Requirements:
o Expert-level UVM and SystemVerilog verification
o Advanced coverage-driven verification methodologies
o Experience with complex SoC verification strategies
o Knowledge of ARM CPU verification techniques
o Understanding of high-speed interface verification (PCIe, USB, DDR)
o Formal verification and assertion-based verification
o Verification planning and test strategy development
o Team leadership and mentoring capabilities
• Key Responsibilities:
o Overall verification strategy and planning
o Test plan development and review
o Coverage goals and sign-off criteria definition
o Verification environment architecture
o Team coordination and quality oversight
o Final verification sign-off
EA licence : 14C7174