Design-for-Test (DFT) Engineer - Singapore

3 days ago


Singapore ByteDance Full time

Responsibilities Responsible for DFT-related work in SoC chips, including Scan, MBIST, ATPG, Boundary Scan, IP test etc. Collaborate closely with STA, physical design, and power engineers to debug and resolve DFT-related Timing/Power-IR problems. Work in partnership with test engineers to bring up test vectors on silicon and ensure successful testing. Qualifications Minimum Qualifications Master’s degree or above, majoring in Microelectronics, Electronics, Computer Science or related fields, with more than 2 years of DFT work experience. Proficient in scripting skills (such as TCL, Perl, Python, etc.). Skilled in using DFT EDA tools and mastering DFT principles and methods. Preferred Qualifications Familiarity with synthesis/STA is preferred. Good team spirit and a serious and responsible work attitude. Good communication skills and fluent in English reading and writing. Seniority level Mid-Senior level Employment type Full-time Job function Quality Assurance Industries Technology, Information and Internet #J-18808-Ljbffr



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