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Senior Digital Hardware Architect for ISP
2 weeks ago
We are looking for an experienced ISP HW Architect to lead the design and implementation of our Image Signal Processing hardware.
Job Description:- Develop and maintain the architecture of our ISP HW, ensuring it meets product features and performance requirements.
- Implement high-level synthesis using Verilog, SystemVerilog, and/or SystemC.
- Verify logic at the ISP level and digital system level.
- Optimize design for low power consumption and gate count reduction.
- Collaborate with cross-functional teams, including algorithm development and digital system design.
- Lead a team of RTL designers and engineers.
- Develop and implement project plans and timelines.
- Ensure timely completion of deliverables.
- Bachelor's or Master's degree in Electrical Engineering or related field.
- Minimum 7 years of experience in digital design and verification.
- Experience with CMOS image sensors and image signal processing (ISP).
- Proficiency in System C/C++, System Verilog, and Catapult HLS tool.
- Strong leadership and communication skills.
- Ability to adapt to changes and prioritize tasks effectively.
Key Skills:
- CMOS Image Sensor
- Image Signal Processing
- Digital Design
- System Design
- RTL Design
- SystemVerilog
- Verilog
- People Management
Why this role is important: As an ISP HW Architect, you will play a critical role in shaping the future of our image signal processing technology. Your expertise will help us develop innovative solutions that meet the demands of our customers.
What we offer:
- A dynamic and collaborative work environment.
- Opportunities for professional growth and development.
- Competitive compensation and benefits package.
- CMOS Image Sensor: Experience with CMOS image sensor design and implementation.
- Image Signal Processing: Knowledge of image signal processing techniques and algorithms.
- Digital Design: Experience with digital design and verification methodologies.
- System Design: Proficiency in system-level design and integration.
- RTL Design: Experience with register-transfer level (RTL) design and synthesis.
- SystemVerilog: Knowledge of SystemVerilog language and its applications.
- Verilog: Experience with Verilog language and its applications.
- People Management: Ability to lead and manage teams effectively.