Senior ASIC Physical Design Verification Engineer

2 weeks ago


Singapore beBeeVerification Full time $143,300 - $247,600
Job Description:

As a member of our team, you will be responsible for the design and optimization of Silicon and Hardware in our data centers including AWS Inferentia, Trainium Systems. Our success depends on our world-class server infrastructure; we're handling massive scale and rapid integration of emergent technologies.


Key Responsibilities:
  • Define, execute and optimize next-generation physical verification and integration methodologies using industry-standard EDA tools (Calibre, IC Validator)
  • Drive chip level physical verification sign-off and closure
  • Perform DRC (Design Rule Checking), LVS (Layout vs. Schematic), PERC (Programmable Electrical Rule Check) verification, and Fill insertion
  • Debug and resolve physical verification issues in collaboration with layout and design teams
  • Interface with foundries for rule deck updates and violation waivers
  • Develop and maintain verification runsets and methodologies
  • Support technology file development and qualification
  • Fine tune cloud infrastructure to improve compute and storage utilization for physical design work
  • Mentor junior engineers on physical verification methodologies and closure

Requirements:

We are looking for a highly skilled Physical Design Verification Engineer with a strong background in semiconductor manufacturing processes and design rules.


Skills and Qualifications:
  • BS + 10yrs or MS + 7yrs in EE/CS, or related field
  • 5+ years in physical verification for advanced technology nodes
  • Expert knowledge of industry-standard physical verification tools (Calibre, IC Validator, PVS)
  • Strong understanding of semiconductor manufacturing processes and design rules
  • Experience with scripting languages (Perl, Python, Tcl)
  • Proven track record of successful tape-outs
  • Strong communication and collaboration abilities

Preferred Qualifications:
  • Experience with integration and verification in advanced nodes (5nm or below)
  • Knowledge of custom and digital design flows
  • Expertise with DFM (Design for Manufacturing) methodologies
  • Expertise in reliability verification (ESD, EM, IR drop)
  • Background in layout design or custom IC development

Benefits:

At our company, we strive to create an inclusive environment that supports the growth and well-being of our employees. We offer a range of benefits to help our employees achieve a better work-life balance, including flexible working hours, professional development opportunities, and a comprehensive benefits package.


How to Apply:

If you are a motivated and experienced Physical Design Verification Engineer looking for a new challenge, please submit your application through our career site. We look forward to hearing from you



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