Staff Engineer, Design Verification

4 weeks ago

Singapore SEARCH STAFFING SERVICES PTE. LTD. Full time
Roles & Responsibilities

Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Product Development (PD) team which will be working on projects.

Staff Engineer, Design Verification (System Verilog)

Responsibilities:

You will be responsible for verifying digital and mixed-signal designs, including systems-on-chip with multiple CPUs, digital signal processors, security hardware, and other logic for IoT applications.


• The right candidate will be a self-starter who assumes full ownership of DV tasks and delivers high-quality results.


• Develop test plans at block, sub-system, and chip level.


• Execute SoC-based verification at full-chip.


• Write C-based lib packages and tests.


• Architect and implement scalable and reusable test benches using SystemVerilog and UVM.


• Develop comprehensive test cases, stimulus generation, and checkers to achieve high coverage.


• Automating the test environment for randomized testing and scoreboarding.


• Utilize advanced debugging techniques to identify and resolve design and verification issues.


• Perform root-cause analysis and work with design teams to fix identified issues


• Define and track functional and code coverage metrics to ensure thorough verification.


• Ensure that verification quality meets or exceeds industry standards and project requirements.


• Edge-based AI inference is preferred.

Requirements


• BSEE /MSEE 5-8 years Degree of experience in block, sub-system, and full-chip verification


• Should have delivered multiple chips functioning to Specification.


• Identify and manage verification deliverables, milestones, and schedules.


• Proactively identify potential verification risks and develop mitigation strategies.


• Collaborate with design, architecture, and software teams to understand and verify design intent.


• Communicate verification progress, issues, and results to stakeholders and management.


• Strong in understanding multiple architectures, integrating 3rd party IPs/VIPs, and working with mixed-signal designs with low-power design and verification challenges


• Strong understanding/exposure to Design Verification for low-power battery-operated designs is highly desired.


• C-based verification in an SoC environment is required


• Experience with ARM processor-based designs and low-power design techniques is a plus.


• Languages: SystemVerilog (UVM), Verilog, C/C++, Python, Perl or Makefile


• Technologies: ARM M/RISC-V (Preferred), AMBA AXI/AHB/APS, DMA, Flow Control, Serial Devices, Qo5


• Preferred technologies: MIPI(CSI/DSI), Crypto, OTP, DSP, Low-Power

Interested applicants, kindly send in a copy of your updated resume in WORD document to hr@searchstaffing.com.sg stating your current and expected remuneration together with notice period required to current employer.

You can also contact Vincent Low for a confidential discussion at 6749 4236.

EA Personnel Registration No: R1324700

Tell employers what skills you have

Perl
Hardware
ARM
Documentation Skills
Digital Signal Processors
Test Cases
EDA
UVM
SoC
SystemVerilog
Flash
Functional Verification
ASIC
Debugging
Verilog
OVM
VLSI

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