(Sr./Staff) Design Verification Engineer

Position Overview: As a design verification engineer, you will be part of a passionate verification team that is constantly pushing the limits – developing and deploying state‑of‑the‑art verification methodologies in ever‑increasing design complexities, from UVM, C/C++ co‑simulation, system emulation to mixed‑mode simulation & formal...

About the job (Staff/Sr. Staff) NPU Design Engineer Responsibilities Develop design requirements of an NPU given system level specifications. Being part of modelling the performance of the NPU module and its data transaction throughput. Microarchitecture design and RTL coding using Verilog / System Verilog HDL for various sub-blocks of the NPU. Understanding...

Location: Singapore, Singapore In Singapore, Thales has been a trusted partner since 1973, originally focused on aerospace activities in the Asia-Pacific region. With 2,000 employees across three local sites, we deliver cutting-edge solutions across aerospace (including air traffic management), defence and security, and digital identity and cybersecurity...

Company Overview Ambiq's mission is to enable intelligence everywhere by delivering the lowest power semiconductor solutions. Ambiq is a pioneer and a leading provider of ultra-low-power semiconductor solutions based on our proprietary and patented sub- and near-threshold technologies. With the increasing power requirements of artificial intelligence (AI)...

**Our vision is to transform how the world uses information to enrich life for all.** Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it...

Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance Implement coverage matrix using cover point and assertion Create and debug tests...

Overview Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance Implement coverage matrix using cover point and assertion Create and debug tests for DUT...

Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance Implement coverage matrix using cover point and assertion Create and debug tests...

Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance Implement coverage matrix using cover point and assertion Create and debug tests...

**Design Verification Engineer** Experience : 4+ Years Salary Range :SGD 6500-8500 **Skills Required**: FPGA SoC Verification Skills ASIC SoC Verification Skills System Verilog and UVM Skills Automation Skills. IP Verification Skills Low power UPF based verification skills **Technical Expertise** Languages :Verilog, System Verilog, C,...