Design Verification Engineer

2 months ago


Singapore REALTEK SINGAPORE PRIVATE LIMITED Full time

JOBDESCRIPTION

In this position, theindividual thoroughly understands digital design specs of variousIP blocks and SoC architecture definition

  • Develop detailed module level and SoC level testplans forall the functional features, based on the design spec.
  • Develop ASIC verification environment including all therespective components such as stimulus, checkers, assertions,monitors and scoreboards.
  • Develop directed andconstrain-random verification functional tests and simulate usingEDA tools to verify functional spec is working
  • Execute verification plans, including design bring-up, DVbring-up, regression enabling for all the features.
  • Collaborate with digital design team to debug functionaltestcases and deliver functionally correct designs

The ideal individual must have proven abilityto achieve results in a fast moving, dynamic environment

JOB REQUIREMENTS

  • BSEE or MSEE, entry level
  • Strong communication, analytical and documentation skillsand ability to interface with other groups
  • Strong VLSI functional verification experience,preferably with exposure to complex, high speed custom VLSIproducts
  • Strong hardware functionalverification language and Object-oriental language developmentskill. Prefer with SystemVerilog/ UVM experience
  • Familiar with ASIC verification methodology, tools, anddevelopment flow
  • Working experience orfamiliar with Ethernet L2/L3 switch/router, SOC, AMBA bus,high-speed IO (USB-2/3, PCIe gen2/3, SATA), Flash controller, orCPU peripherals
  • Singaporeans are welcome toapply

 



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