ASIC Design Engineer

We are seeking a FPGA/ASIC Engineer to collaborate with our technical team and take charge of designing and implementing high-performance digital circuits on FPGA or ASIC. Your role will involve managing the entire FPGA build flow, including RTL coding, verification, and timing closure.Responsibilities Design and implement highperformance digital circuits on...

Responsible for RTL design, simulation, and verification for ASIC/SoC products. Identify internal and external requirements, PPA study, RTL coding, implementation and work closely with backend team. Create reusable internal IPs for AI and/or inmemory computing products. Handle IP integration and validation and support postSi testing and...

Roles & ResponsibilitiesPosition Overview: The Staff/Senior Design Engineer will be responsible for developing micro-architecture for Image Signal Processing Unit (ISP) and Computer Vision Unit (CV) related algorithms. They will utilize RTL design using Verilog/System Verilog coding and High-Level Synthesis (HLS) tools like Catapult. Additionally, they will...

About the teamYou will be part of our IC Lab team based in our Singapore regional HQ office.How you will stand out: Knowledge of submicron semiconductor technology Familiar with digital ASIC/SOC design flow from RTL to silicon characterization Familiar with Synopsys and Cadence EDA tools for Simulation, Synthesis, Timing (STA), Formal and Assertionbased...

Roles & Responsibilities Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification. Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance. Build reusable testbench, constrained-random/directed test cases, and...

Roles & Responsibilities Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification. Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance. Build reusable testbench, constrained-random/directed test cases, and...

Roles & ResponsibilitiesResponsibilities: Lead RTL design, simulation, and verification for TetraMem ASIC/SoC products, ensuring robustness. Integrate and validate IP blocks for seamless system functionality. Analyze requirements for Power, Performance, and Area (PPA), optimizing design trade-offs. Collaborate with backend team in RTL coding,...

Roles & ResponsibilitiesResponsibilities Work with MEMS Research & Development, ASIC design team & Packaging team to perform failure analysis in root cause finding for improvement or issue investigation. In-charge of failure analysis request from internal customers and external customers for customer returns, production/process rejects, and...

Roles & ResponsibilitiesResponsibilities Work with MEMS Research & Development, ASIC design team & Packaging team to perform failure analysis in root cause finding for improvement or issue investigation. In-charge of failure analysis request from internal customers and external customers for customer returns, production/process rejects, and...

Roles & ResponsibilitiesKey Responsibilities: Working on ASIC digital design, including RTL coding based on Verilog, simulation, RTL and gate-level verification, code coverage, testbench development, logic synthesis, and design documentation.Key Requirements: Master/Degree in Electrical Engineering with 3 years of ASIC design. experience preferred. ...

Roles & ResponsibilitiesJOB DESCRIPTION· Discussion with system engineers on SoC architecture and feedback on optimization.· Work on SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc;· Discussion with synthesis engineer and back-end engineer on design optimization.· SoC DFT...

Roles & ResponsibilitiesKey Responsibilities: Working on ASIC digital design, including RTL coding based on Verilog, simulation, RTL and gate-level verification, code coverage, testbench development, logic synthesis, and design documentation.Key Requirements: Master/Degree in Electrical Engineering with 5 years of ASIC design. experience preferred. ...

Roles & ResponsibilitiesKey Responsibilities: Working on ASIC digital design, including RTL coding based on Verilog, simulation, RTL and gate-level verification, code coverage, testbench development, logic synthesis, and design documentation.Key Requirements: Master/Degree in Electrical Engineering with 5 years of ASIC design. experience preferred. ...

JOB DESCRIPTION Discussion with system engineers on SoC architecture and feedback on optimization. Work on SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc; Discussion with synthesis engineer and back-end engineer on design optimization.    SoC DFT support; SoC verification plan and...

JOB DESCRIPTIONDiscussion with system engineers on SoC architecture and feedback on optimization.Work on SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc;Discussion with synthesis engineer and back-end engineer on design optimization.   SoC DFT support;SoC verification plan and SoC...

JOB DESCRIPTION Discussion with system engineers on SoC architecture and feedback on optimization. Work on SoC integration; system block development, e.g., power management, clock/reset, system register, test control, PinMux, etc; Discussion with synthesis engineer and back-end engineer on design optimization.    SoC DFT support; SoC verification plan and...

Job Title: Embedded Memory Design EngineerCompany: Cutting-edge Semiconductor SolutionsJob Description:Design Engineer specialized in embedded memory design and verification for high performance ASICs aimed at Cloud AI, Data Center Network Switches, 5G infrastructure, CPUs, and AP-SOCsCollaborate closely with product and architecture teams to define, design,...

Responsibilities: Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification. Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance. Build reusable testbench, constrainedrandom/directed test cases, and verification...

Roles & ResponsibilitiesJOB DESCRIPTION· Work with system engineers on timing requirements and feedback on optimization.· Work on SoC timing constraint, synthesis and timing closure.· Work on power structure, eg. Isolation of power domains, level-shifter crossing voltage domains· Conduct formal verification for release comparison.· Support back-end...

Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification. Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance. Build reusable testbench, constrainedrandom/directed test cases, and verification associated...