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Asic Design Engineer
2 weeks ago
Work closely with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.
- Create and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.
- Build reusable testbench, constrainedrandom/directed test cases, and verification associated behavioural modules for both block levels and system levels.
- Use regression strategy, methodology and tool scripts and measure the function coverage.
Requirements:
- Degree in Electrical/Computer Engineering or Computer Science or equivalent.
- At least 5 years of experience in
building verification infrastructure, test planning, coverage closure, testbench and test cases development for function/performance verification
- Strong knowledge of
UVM/OVM, Semiformal Verification, assertionbased verification, hardware and software coverification methodology
- Proficient with
Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding
- Familiar with
MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.
Registration:
R1326740
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