Junior / Senior R&D Digital IC Design Engineer

2 months ago


Singapore LITE-ON SINGAPORE PTE. LTD. Full time
Roles & Responsibilities

Key Responsibilities:

  • Working on ASIC digital design, including RTL coding based on Verilog, simulation, RTL and gate-level verification, code coverage, testbench development, logic synthesis, and design documentation.

Key Requirements:

  • Master/Degree in Electrical Engineering with 3 years of ASIC design.
  • experience preferred.
  • Familiar with ASIC design flow.
  • Experience in RTL coding based on Verilog. Familiar with the digital simulation debugging environment.
  • Familiar with UNIX/Linux environment and scripting.
  • A team player with good communication skills.
  • Able to work independently, flexibly, and creatively.
  • Strong analytical and problem-solving.

Tell employers what skills you have

Analog
Scripting
Good Communication Skills
SoC
SystemVerilog
Cadence
ASIC
Team Player
Debugging
IC
Verilog
Electrical Engineering
Layout
Silicon
Able To Work Independently

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