brightec

Brightecs Innovation Pte. Ltd. (BIP) in Singapore seeks a senior RFIC/PLL engineer to lead advanced CMOS PLL architecture, layout, and verification. You will drive architecture choices, calibrations, and testing to achieve sub-100 fs jitter and wide tuning ranges with robust PVT behavior. The role emphasizes device-level design, layout leadership, and chip...

Brightecs Innovation Pte. Ltd. (BIP) in Singapore seeks an experienced analog/mixed-signal design engineer to lead high-speed SAR ADC development for RF transceivers and data converters. You will optimize critical blocks, model parasitics, and collaborate with layout and systems teams to ensure silicon performance and reliability. The role requires 8+ years...

Brightecs Innovation Pte. Ltd. (BIP) is seeking a highly skilled engineer to define a CMOS standard cell library and optimize it for design-technology-co-optimization (DTCO) in Singapore. You will integrate process, circuit simulation, and place-and-route analysis to ensure competitiveness across technology generations. This role requires a Master’s degree...

Brightecs Innovation Pte. Ltd. (BIP) seeks a senior specialist to lead 3D NAND device architecture design, process integration, and reliability analysis. You will design DoE studies, assess variation impacts, and push technology iterations with the process development team. You will also write technical reports and assist customers or internal teams in...

Brightecs Innovation Pte. Ltd. in Singapore is seeking an SRAM design engineer to develop SRAM compilers and custom circuits to meet PPA customization requirements. You will perform transistor-level simulations and verification with industry EDA tools to ensure designs meet specifications. You will also characterize SRAM Compiler options and deliver Design...

Brightecs Innovation Pte. Ltd. is seeking an experienced engineer to design high-speed analog circuits for DDR PHY interfaces (DDR4/DDR5/LPDDR5/6) in Singapore. You will optimize PPA and SI while delivering robust silicon through JEDEC-compliant methods and advanced node implementations. Responsibilities include modeling channel losses, crosstalk, jitter and...

Brightecs Innovation Pte. Ltd. (BIP) is seeking a senior DRAM memory architect to lead architecture and technology development for next‑generation DRAM memory and channel oxide materials. The role requires coordinating multi-disciplinary teams across circuit, device, firmware, verification, and testing to deliver scalable, reliable memory solutions. Ideal...

Brightecs Innovation Pte. Ltd. (BIP) is seeking a senior DRAM memory architect to lead architecture and technology development for next‑generation DRAM memory and channel oxide materials. The role requires coordinating multi-disciplinary teams across circuit, device, firmware, verification, and testing to deliver scalable, reliable memory solutions. Ideal...

Brightecs Innovation Pte. Ltd. (BIP) in Singapore seeks a senior CPU architect and RTL lead to design high-performance CPU cores and IP blocks. You will define microarchitecture, implement RTL in Verilog/SystemVerilog, and collaborate across verification, synthesis, and backend teams to meet PPA targets. You will contribute to pre- and post-tape-out...

Brightecs Innovation Pte. Ltd. (BIP) in Singapore seeks a senior CPU architect and RTL lead to design high-performance CPU cores and IP blocks. You will define microarchitecture, implement RTL in Verilog/SystemVerilog, and collaborate across verification, synthesis, and backend teams to meet PPA targets. You will contribute to pre- and post-tape-out...

Brightecs Innovation Pte. Ltd. is seeking a senior IC design engineer to architect and verify digital control logic for 3D-NAND memory. You will implement RTL encoding in Verilog/SystemVerilog, design FSMs, and ensure JEDEC-compliant interfaces.You will collaborate with FW, analog/mixed-signal, and verification teams, contribute to UVM environments, DFT,...

Brightecs Innovation Pte. Ltd. (BIP) is seeking a highly skilled engineer to define a CMOS standard cell library and optimize it for design-technology-co-optimization (DTCO) in Singapore. You will integrate process, circuit simulation, and place-and-route analysis to ensure competitiveness across technology generations. This role requires a Master’s degree...

Brightecs Innovation Pte. Ltd. in Singapore seeks an experienced analog/mixed-signal circuit designer for mission-critical NAND/NVM projects. You will design, simulate, and verify HV/high-voltage circuits, develop Verilog-A models, and perform large-scale mixed-signal verification.You will collaborate with device, process, digital, verification, and testing...

Brightecs Innovation Pte. Ltd. in Singapore is seeking an SRAM design engineer to develop SRAM compilers and custom circuits to meet PPA customization requirements. You will perform transistor-level simulations and verification with industry EDA tools to ensure designs meet specifications. You will also characterize SRAM Compiler options and deliver Design...

Brightecs Innovation Pte. Ltd. (BIP) in Singapore seeks an experienced analog/mixed-signal design engineer to lead high-speed SAR ADC development for RF transceivers and data converters. You will optimize critical blocks, model parasitics, and collaborate with layout and systems teams to ensure silicon performance and reliability. The role requires 8+ years...

Develop SRAM Compilers and custom Instance circuits to meet specific PPA customization requirements. Perform transistor-level circuit simulation and verification using EDA tools, and analyze circuit functionality and performance to ensure designs satisfy requirements. Responsible for SRAM Compiler characterization analysis and delivering Design Kits. Design...

Define a standard cell library for CMOS processes and optimize it for DTCO by combining process, circuit simulation, and place-and-route analysis, ensuring the competitiveness and feasibility of the Standard Cell for each technology generation. Design Testkeys to characterize the standard cell library PPAs and provide feedback to the process and model....

Lead the architecture design (e.g. memory cells, select transistors, and peripheral devices), process integration, electrical characterization, modeling and simulation, failure analysis for 3D NAND devices.Design and execute DoE, analyze the impact of process variations on device performance and reliability (such as durability and data retention), and...

Design high-speed analog circuits for DDR PHY interfaces (DDR4/DDR5/LPDDR5/6). Optimize power, performance, area (PPA), and signal integrity (SI). 2. Signal/Power Integrity (SI/PI) Analysis.Model and simulate channel losses, crosstalk, jitter, and eye diagrams. Ensure compliance with JEDEC standards (e.g., DDR5-6400 MT/s). Design impedance-matching networks...

Design high-speed (>100MS/s) Successive Approximation Register (SAR) ADCs for applications like 5G, radar, and data converters. Optimize critical blocks: capacitor DAC arrays, high-speed comparators, bootstrapped switches, and digital control logic. Achieve target specifications: ENOB (Effective Number of Bits), SFDR (Spurious-Free Dynamic Range), power...