Research Fellow

Research Fellow / Research Associate / Research Engineer (Hardware-Intrinsic Security) Department: QUASAR Posted Date: 24 September 2025 Closing Date: Open until filled Hours: Full Time Duration: Fixed term contract About TUMCREATE TUMCREATE is a multidisciplinary research platform of the Technical University Munich (TUM) at the Singapore Campus for Research Excellence and Technological Enterprise (CREATE). We are joining forces with universities, public agencies, and industry for the advancement of future technologies. Our research program on post-quantum Security, ‘QUASAR - QUANTUM SECURITY AND RESILIENCE FOR EMERGING TECHNOLOGIES’ funded by Singapore’s National Research Foundation (NRF), is a collaborative effort between the Technical University Munich (TUM), Fraunhofer Singapore, Nanyang Technological University (NTU), the National University of Singapore (NUS). At TUMCREATE, we will focus on developing an open and verifiable Quantum safe RISC-V processor platform as a foundation for the QUASAR program. As part of the QUASAR team, you will work alongside renowned scientists in Integrated Circuit (IC) design, security, and quantum technologies. Please visit for more information about TUMCREATE. Job Summary We are seeking a highly motivated and skilled researcher in Secure Hardware Design. You will research leading-edge True Random Number Generator (TRNG) and Physical Unclonable Function (PUF) solutions in the context of post quantum security applications, especially dedicated to a RISC-V processors. You will investigate and provide advanced designs and algorithms for PUF-based key-storage and authentication solutions and accelerators to provide randomness to an open-source post-quantum secure system. You will be responsible for the physical design and the integration of analog components in a team for IC design of an RISC-V processor. This is a fixed term contract until March 2029. Key Responsibilities Research and provide TRNG and PUF solutions for an open-source RISC-V processor. Research and perform backend design using open-source tools, especially for the design of an open-source post-quantum secure RISC-V processor. Collaborate with experts in design automation, IC design, and security to enable leading-edge hardware-intrinsic security solutions and IC design. Write scientific manuscripts, contribute to project reports, and present findings at international conferences and stakeholder meetings. Proven expertise in hardware security and/or analog design and/or digital design and/or physical IC design. Excellent written and verbal communication skills in English, with the ability to communicate complex analytical results to multidisciplinary teams. Demonstrated ability to work independently and collaboratively in a fast-paced, international research environment. Qualification Requirements We are seeking for candidates with a Bachelor’s degree in electrical engineering or related fields with at least two years of experience in physical IC design or analog circuit design, or Master’s degree in electrical engineering or related fields with focus on hardware security, digital circuit design or analog circuit design, or PhD degree related to hardware security, embedded security, embedded systems or circuit design. Candidates expecting to fulfil one of these requirements within 2 months after application are welcome to apply. Publications in the domain of TRNGs or PUFs at premier conferences and in premier journals are considered a strong asset. What we offer A collaborative and inclusive world-class research environment. Opportunities for scientific leadership for research fellows. The opportunity to pursue a PhD (awarded by the Technical University of Munich) for research associates with a master’s degree. Opportunities for professional development. Engagement with a leading international team addressing challenges in IC design for post-quantum security. Applications Please send your complete application, including cover letter (compulsory), CV, university transcripts to Only shortlisted candidates will be contacted. #J-18808-Ljbffr