Senior Engineer Design Enablement
2 weeks ago
About GLOBALFOUNDRIES
Introduction
Your Job
- Develop and validate Parasitic Extraction (PEX) runsets and any other PDK collateral of major EDA vendors (Synopsys, Siemens and Cadence).
- Maintain, enhance and create the development and validation flows and automation to ensure high operational efficiency and best-in-class quality for PDKs.
- Provide prompt feedback and resolution to PDK-related queries from field engineers and customers.
Other Responsibilities:
- Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs
Required Qualifications:
- Bachelor of Engineering in Electrical Engineering with 4 years of working experience in a PDK- or design-related role.
- Working experience in major EDA tools for design, layout and Layout-vs-Schematic (LVS) (e.g., Cadence Virtuoso/Spectre, Calibre LVS/DESIGNrev, Synopsys Hspice).
- Good knowledge of semiconductor device layouts.
- Good knowledge of scripting and/or programming in shell, Perl or Python.
Preferred Qualifications:
- Master of Engineering in Electrical Engineering with 3 years of working experience in a PDK- or design-related role.
- Working experience in major EDA tools for PEX (e.g., Cadence Quantus, Calibre xRC/xACT and Synopsys StarRC)
- Working experience in scripting and/or programming for EDA tool automation.
GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard.
As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.
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