Senior Physical Design Engineer

**Responsibilities**:
Maxlinear is seeking a Senior Physical Design Engineer to be part of a SoC LPS team dealing with complex Communication ICs (wifi, router, PHY) in 16nm/8nm/5nm. In this role, you will focus on:

- Responsible for toplevel and blocks whose complexity is at the limit of current tool capacity
- Responsible for all aspects of physical implementation, include floor-planning, physical synthesis, clock-tree synthesis, parasitic extraction
- Responsible for IO ring design and bump implementation, meeting ESD, EMI and SSO requirements
- Implementation of Low power layout methodology (multiple switchable power domains, level shifter)
- Execution of static and dynamic drop, ramp up analysis using Redhawk
- Perform static timing analysis to handle complex timing closure
- Work with other design engineer in Synthesis, Design for Testability, STA/timing closure and Equivalent checks to resolve issues

Qualifications:

- Experience with complex Low Power SOC in 16nm/7nm, 5nm is a plus
- Good experience with Cadence or Synopsys implementation tool (Tempus, Innovus, DC, ICC2, Fusion Compiler), experience with Cadence implementation tool is a plus
- Experience in Mentor Verification tool, Calibre
- Experience in Redhawk
- Proficient in TCL code, python knowledge is a plus
- Able to work in a multi-cultural team with a strong drive to excel
- Good written and communication skills
- Master’s/Bachelor’s Degree in Electrical/Electronics Engineering with an emphasis in IC design with minimum 5 years or more related experience

Company Overview:
We hire the best people in the industry and engage them in some of the most exciting opportunities that connect the world we live in today. Our growth has come from innovative, bold approaches to solving some of the world’s most challenging communication technology problems in the most efficient and effective manner.

MaxLinear began by developing the world’s first high-performance TV tuner chip using standard CMOS process technology. Others said we couldn’t achieve the extremely high-performance requirements using CMOS, but we proved them wrong and achieved enduring global market leadership with our designs. Since then, we’ve developed a full line of products that drive 4G and 5G infrastructure; enable data center, metro and long-haul optical interconnects; bring 10Gbit to the home; power the IoT revolution; and enable robust and reliable communication in harsh industrial environments. Over the years, we’ve expanded through organic growth and through several acquisitions that have perfectly complemented our existing portfolio and enabled us to deliver complete end-to-end solutions in our target markets. One such example was the acquisition of Intel’s Home Gateway Platform Division that added Wi-Fi, Ethernet, and Broadband Gateway Processor SoC technology to our connected home portfolio creating a complete and scalable platform of connectivity and access solutions to fully address our customers’ needs.

Our headquarters are in Carlsbad, near San Diego, California. We also have major design centers in Irvine and San Jose, California; Waltham, Massachusetts; Vancouver, Canada; Valencia, Spain; Bangalore and Chennai, India; Villach, Austria; Munich, Germany; Israel; and Singapore.

We have approximately 1,500 employees, a substantial majority of whom have engineering degrees and include masters and Ph.D. graduates from many of the premiere universities around the world. Our employees thrive on innovation, outstanding execution, outside-the-box thinking, nimbleness, and collaboration. Together, we form a high-energy business team that is focused on building the best and most innovative products on the market.