Senior Staff Design Verification Engineer(Soc)

- Meet the Team As Senior Staff Verification Engineer, you will be working closely with the IC Design, System, and Architecture teams to develop and execute the verification plan for the next generation of IoT chips. **Responsibilities**: - Block and IP Verification- Block-level verification to validate block performance and adherence to requirements-...

Roles & Responsibilities Job Description: We are seeking a SoC Verification Engineer to test and validate System-on-Chip (SoC) designs. You will work with cross-functional teams to ensure chip functionality through verification using UVM , SystemVerilog , Python , and other cutting-edge tools. Responsibilities: Develop verification plans for module and...

About the job (Sr./Staff) SoC Design Engineer Description You would be part of a dynamic digital SoC design team that develops state-of-the-art video processing, neural processing, advanced video analytics accelerators, and the entire Camera Processor SoC. You would be joining the team to explore, evaluate and define innovative design SoC architectures, to...

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world's most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity...

In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition. Develop detailed module level and SoC level test plans for all the functional features, based on the design spec. Develop ASIC verification environment including all the respective components such as stimulus, checkers,...

In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition. Develop detailed module level and SoC level test plans for all the functional features, based on the design spec. Develop ASIC verification environment including all the respective components such as stimulus, checkers,...

Overview In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition. Responsibilities Develop detailed module level and SoC level test plans for all the functional features, based on the design spec. Develop ASIC verification environment including all the respective components such as...

In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition. Develop detailed module level and SoC level test plans for all the functional features, based on the design spec. Develop ASIC verification environment including all the respective components such as stimulus, checkers,...

**Company Overview**: **Staff Engineer - Design Verification** **Responsibilities**: **Specific Responsibilities**: - Must have participated in all phases of chip development, from creating test plans, creating testbench environment (SV/UVM), integrate VIP's, automate test env for randomized testing and score boarding. - Utilize UVM to create drivers,...

**Company Overview**: **Staff Engineer - Design Verification** **Responsibilities**: **Specific Responsibilities**: - Must have participated in all phases of chip development, from creating test plans, creating testbench environment (SV/UVM), integrate VIP’s, automate test env for randomized testing and score boarding. - Utilize UVM to create drivers,...