Platform Manager, External Platform Planning

This is a senior technical leadership position within the Foundry Technology and Engineering (FTE) organization in Global External Manufacturing and Sourcing (GEMS).

Responsibilities will include, but not be limited to:
1. Partner with internal product, external foundry (TSMC, Samsung, others), PAT suppliers, TFM/IP suppliers and supply chain teams to understand overall product requirements, including PPAC targets, timelines, and testchips.

2. Partner with external foundry and PAT suppliers (internal and external) to understand/address technology and cost/capacity planning.

3. Drive the platform readiness plan (especially testchips) to mitigate risks of process/PDK, TFM, and IP designs with the overarching goal of bringing together the right components to allow Intel to deliver industry leading products across segments of interest.

4. Leverage and augment available industry competitive data to help guide the co-optimization effort such that we establish leadership foundry/PAT portfolio. 5. Influence the ecosystem function and organization within CPG to support current and future generations of process nodes under definition, including strategy/sourcing, pre/post-silicon review, PDK/collateral compliance/QA infrastructure, testchip/validation plan, etc.

Some amount of travel, when safe and necessary, to meet customers and suppliers may be required. This role requires hands-on technical data collection, analysis, automation, and presentation/recommendation.

**Qualifications**:
You should possess a minimum of a Bachelor's degree in engineering fields relevant to RnD activities in VLSI design or semiconductor manufacturing with at least 10 years of relevant industry experience (strongly prefer 5+ years of direct, hands-on track record in leading deep submicron foundry/IP engagements and customer/supplier interface), or currently an Intel Gr9 within relevant domain. MBA and/or Ph.D. degree a plus. Additional qualifications include: Deep knowledge of the latest (7nm or newer) silicon manufacturing technologies development capabilities, device physics/models and scaling. Deep knowledge and experience in process feature, tool, logic and memory circuit optimization for low-power and high-speed VLSI. Deep knowledge of process, packaging and TFM/IP customer requirements, portfolio/supplier management, competitive benchmarking and industry trends. Knowledge of industry standard CAD tools/flows for digital and/or analog design. Specific experience with Cadence Virtuoso and Spectre/Hspice is a plus. Demonstrate capacity to address complex problems algorithmically. Very strong communication skills with the ability to take complex topics and concepts and synthesize them as appropriate for effective consumption by a wide range of individuals (engineering level to executive level).

**Inside this Business Group**:
Intel's Sales and Marketing (SMG) organization works with global customers and partners to solve critical business problems with Intel based technology solutions. SMG works across business units to amplify the customer voice and deliver solutions that accelerate their business. We work across numerous industries, including retail, enterprise and government, cloud services and healthcare as examples. The operations team focuses on forecasting, driving alignment with factory production and delivering efficiency tools and our marketing capability drives demand and localized marketing in locations around the globe. Our sales force navigates a complex partner and customer ecosystem while shaping product roadmaps, driving value for our customers, and collaborating to harness emerging technology trends to deliver comprehensive solutions.

**Other Locations**:
SG, Singapore

**Posting Statement**:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

**Benefits**:
**Working Model**:
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
**In certain circumstances the work model may change to accommodate business needs.**
JobType

Hybrid