Standard Cell Library Design Engineer Intern

6 hours ago


Singapore 聯發科技 Full time $40,000 - $60,000 per year

[What's in it for you?]
• Responsible for Standard Cell Library Characterization for leading edge process node (7nm/5nm/4nm/3nm), as the pioneer to setup design platform for MediaTek projects.
• Perform timing/ power/ constraint/ noise/ variation modeling, analysis and flow development for >15K logic circuit for one process node.
• Testchip design and Si data analysis flow development for advanced technology node (



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