Staff Digital IC Design Engineer
24 hours ago
· RTL-leveldigital design and problem solving
· Function verification and support
· Work closely with backend team on Digital synthesis, place-and-route, Design for Test and Static timing analysis
· Lead and guide junior engineers
· Digital functional verification and FPGA verification
· Bachelor/Masters in Electronics/Electrical Engineering with Mixed Signal IC design/verification experience.
· Fluent in Verilog coding, design, simulation, and verification domains.
· Definition and implementation of custom digital interfaces (I2C, 3-wire, single_wire etc.).
· Definition and implementation of custom finite state machines, register maps, control logic which interface with analog circuits such as drivers and proprietary IPs like OTP or flash memory
· RTL design for synchronous and asynchronous applications, including multiple clock domains
· Basic knowledge of Logic synthesis, place & route, static timing analysis, logic equivalency checking
· Usage of Cadence tools like Incisive Enterprise Simulator, SimVision, Genus, First Encounter, Conformal, Modus, Tempus and Virtuoso will be preferred
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