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Senior Ic Design Verification Engineer

2 weeks ago

Singapore SINCHIP TECHNOLOGY PTE. LTD. Full time

**Job description**
- Experience in UVM verification methodology
- Experience in developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification
- Disciplined, quality-minded, and highly driven for excellence,
- Excellent team player and good communication skills
- MSEE/BSEE in Electrical Engineering or Computer Engineering, with 3 years of relevant experience, but are open to fresh graduates with outstanding results