Senior Dft Engineer

**What you do at AMD changes everything**

We care deeply about transforming lives with AMD technology to enrich our industry, our communities and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence, while being direct, humble, collaborative and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team.

AMD together we advance_

**What you do at AMD changes everything**

At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks for gaming, Immersive platforms, and the data center.

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

**Senior DFT Engineer**

**THE ROLE**:
**THE PERSON**:
We are looking for someone with the will to overcome challenging problems and strong appetite for technical knowledge. A results-oriented engineer with good stakeholder management skills which are crucial when interfacing with various teams across AMD. A strong and effective communicator, both verbal and written, which are essential when working with a global team. A proactive, outstanding teammate who focuses on teamwork, team building, and growing team success

**KEY RESPONSIBILITIES**:

- Develop Structural Test Patterns (Scan/MBIST/iJTAG) for multiple IPs in Next Generation Xilinx MPSoCs
- Achieve Structural test coverage target of the Digital logic, SRAMs and Mixed-Signal IPs using ATPG and different fault models
- Develop iJTAG Network and Memory BIST / Repair patterns
- Pre-silicon verification of DFT schemes and patterns using Industry standard tools.
- Diagnose and debug the pattern failures on ATE to root cause the problem
- Responsible for implementing techniques to Optimize Test Time, Dynamic IR drop in scan shift and Yield improvement
- Work closely with Design Team and Product Engineering Teams to quickly resolve issues and meet high volume production schedule

**PREFERRED EXPERIENCE**:

- 2-5 years’ experience in DFT and ATPG
- Knowledge of Fault modelling, Scan architecture, Scan compression and Memory testing techniques
- Expertise with industry Standard tools like TestKompress, DFT advisor, DFT Compiler, VCS
- Experience in Gate Level Simulation and Debug
- Good understanding of Digital Design and ASIC design flow
- Knowledge in VHDL/Verilog and IEEE 1149.1 standard
- Knowledge of Perl / Shell Scripting and C++ is a plus
- Knowledge of FPGA and Vivado Software is a plus
- Self-motivated and a strong team-player
- Strong analytical and problem-solving skills
- Ability to learn new tools and technologies

**ACADEMIC CREDENTIALS**:

- Bachelor/Master’s degree in Electrical/Electronic/Computer Engineering

**LOCATION**:
Singapore
- AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. EOE/MFDV_
- #LI-MM2_

**Requisition Number**:183488
**Country/Region/Location**:Singapore **State/Province**:Singapore **City**:Singapore
**Job Function**:Reliability & Test