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SOC Verification Engineer
2 weeks ago
Location- Singapore- Experience- 10- Job Type**Job Description**:
**JD **Design **Verification **Team Lead, SoC**
Take charge of verification team.
Designing & deploy verification methodologies in ever-increasing design complexities, from UVM, C/C++ co-simulation, system emulation to mixed-mode simulation & formal verification.
Perform test plan reviews systematically and execute the plan on-time with high quality.
Achieve zero-defect with the best and smartest approach to the large verification space.
**Requirements**:
Bachelor & Master in Electrical Engineering or Computer Engineering
At least 10 years of relevant experience.
Expertise in Universal Verification Methodology (UVM) processes.
Quality-minded, and highly driven for excellence.
Excellent team player and good communication skills.
Experience in video processing and video analytics is a plus.
**Skills**:
C/c++, Methodologies, Excel, Communication Skill, C++
About Company
EnviroDynamics is a search and recruitment service firm, devoted to finding ideal matches for companies in the Engineering and Healthcare industries. We provide executive search services, as well as professional staffing and manpower outsourcing to satisfactorily meet all of your company’s human capital needs.
No matter the project at hand or the role that needs to be filled, our knowledgeable and trustworthy consultants provide human resource options that meet your discerning credentials with respect to skill and competence, in addition to being ever mindful of your company’s cultural and philosophical demands. And we deliver solutions according to your timeframe and with the utmost professional discretion.
