
Senior/ Digital Verification Engineer
2 days ago
Extract the test point/test plan according to the spec, and formulate the verification plan;
- Code to implement reusable verification components, and setup a verification environment;
- Testcase writing and debugging, assisting design engineers to fix bugs;
- Complete the collection and analysis of code coverage and function coverage to ensure the completeness of verification;
- Participate in the construction and maintenance of the verification common platform;
- Write invention patents in digital verification, and write related documents;
- Complete other verification work arranged by the company;
**Job Requirements**
- Bachelor’s or Master’s Degree in information technology;
- Familiar with tools and languages related to digital verification, and have a strong ability to write technical documents;
- Proficient in chip verification process and UVM verification methodology. Prefer with System Verilog/ UVM experience;
- Good team player with certain pressure resistance;
- Fluent English and Mandarin communication is mandatory.
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