Senior Staff/staff Design Verification Engineer

- Meet the Team As Senior Staff Verification Engineer, you will be working closely with the IC Design, System, and Architecture teams to develop and execute the verification plan for the next generation of IoT chips. Responsibilities- Block and IP Verification- Block-level verification to validate block performance and adherence to requirements- Generate...

Roles & ResponsibilitiesOur client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. The Singapore office houses the Product Development (PD) team which will be working on projects. Staff Engineer, Design VerificationResponsibilities:You will be responsible for verifying digital and mixed-signal...

**Company Overview**: **Staff Engineer - Design Verification** **Responsibilities**: **Specific Responsibilities**: - Must have participated in all phases of chip development, from creating test plans, creating testbench environment (SV/UVM), integrate VIP's, automate test env for randomized testing and score boarding. - Utilize UVM to create drivers,...

**Company Overview**: **Staff Engineer - Design Verification** **Responsibilities**: **Specific Responsibilities**: - Must have participated in all phases of chip development, from creating test plans, creating testbench environment (SV/UVM), integrate VIP’s, automate test env for randomized testing and score boarding. - Utilize UVM to create drivers,...

Singapore, Central, Singapore **Company Overview**: **Staff Engineer - Design Verification**: **Responsibilities**: **Specific Responsibilities**: - Must have participated in all phases of chip development, from creating test plans, creating testbench environment (SV/UVM), integrate VIP’s, automate test env for randomized testing and score boarding. -...

**Responsibilities** - Develop detailed verification plans based on design specifications and architectural requirements. - Create and maintain testbenches for complex digital designs using SystemVerilog and UVM (Universal Verification Methodology). - Write, debug, and execute test cases to verify functionality, performance, and power consumption of our SoC...

**Our vision is to transform how the world uses information to enrich life for all.** Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it...

**Company Overview **Responsibilities **Specific responsibilities include**: - Develop test plans at block, sub-system, and chip level. - Execute SoC-based verification at full-chip. - Write C-based lib packages and tests. - Architect and implement scalable and reusable test benches using SystemVerilog and UVM. - Develop comprehensive test cases, stimulus...

Roles & ResponsibilitiesIn this role you will be part of a world-class IC design team responsible for the development and deployment of software solutions for a revolutionary computing system, which will reduce the energy consumption of AI processing by two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT...

Our new hire, a Chip Verification Engineer, will embark on an important journey of executing SoC verification tasks while collaborating closely with team members to explore and grasp the vital functional and safety-related requirements that drive our success. In your new role you will: - **Execute SoC verification tasks **and work closely with team members...