Technical Manager

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Our client, a leading multinational semiconductor company, is seeking an experienced Technical Manager (Design Verification) to join their expanding team. This is a high-impact leadership role, ideal for candidates with deep verification expertise and a strong background in SoC and IP-level verification.
Key Responsibilities:
Develop and review test plans for module, IP, and SoC-level verification.
Design and implement verification environments/testbenches.
Develop Verification IP (VIP) and reference models.
Execute tests using randomization and coverage-driven methodologies.
Perform functional and code coverage closure.
Hands-on coding and debugging using UVM, SystemVerilog, Verilog, and SystemC.
Carry out low power verification and support verification automation flows.
Collaborate closely with design, architecture, and software teams to ensure comprehensive verification.
Job Requirements:
Bachelor’s or master’s degree in electrical /Electronic Engineering, Computer Engineering , or
related field .
Minimum 8 years
of experience in IC/ASIC
design verification , preferably at SoC level.
Proven experience with
SoC interfaces and protocols : Ethernet, PCIe, DDR, USB, ARM CPU.
Strong
System Verilog/UVM
skills and debugging capabilities.
Proficient with
industry-standard EDA tools
(Synopsys, Cadence, Mentor).
Experience in
low power verification
and
formal verification
is an advantage.
Solid knowledge of
UNIX scripting , including
Python, Perl, Makefiles, C Shell .
Strong communication and leadership skills; able to mentor junior engineers.
Fast learner, proactive, and a strong
team player .
If you are interested in this role, please click on Apply Now
Please note that only shortlisted candidates will be contacted, thank you.
EA License Number: 23C2060
Registration ID is R
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Seniority level
Seniority level Mid-Senior level
Employment type
Employment type Full-time
Job function
Industries Semiconductor Manufacturing
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