IC Verification Engineer

**Department**: IC Design & Development - **Reporting To**: Manager - IC Design & Development - **Location**: Singapore - **Position Summary**: **Position Summary** Perform ASIC Verification **Key Responsibilities** - Digital IC Verification - Develop and maintain verification environment for module and SOC level level using UVM methodology. - Create and...

JOB DESCRIPTION: - Perform with various activities on RTL design implementation and verification at SoC level. - Responsible for RTL coding, logical synthesis, functional test plan, test bench development, RTL and gate-level simulation/verification, code coverage, formal verification, test vector generation and design documentation. - Work and provide high...

Senior Verification Engineer for Digital IC Design Job Description: We are seeking a highly skilled Senior Verification Engineer to join our team. The ideal candidate will have extensive experience in digital design verification, including SoC and IP block development. The successful candidate will be responsible for developing detailed test plans,...

Overview Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance Implement coverage matrix using cover point and assertion Create and debug tests for DUT...

Job Descriptions Develop and Review Test Plan based on IC design specification Develop constrained-Random verification environment for complex DUT Develop/Modify Testbenches and test programmes using UVM-SV for Pre-Silicon IP/ICs/SOCs and ensure product meet their performance Implement coverage matrix using cover point and assertion Create and debug...

Job Title: Senior IC Verification Specialist This position offers the opportunity to work on the design and verification of digital ICs, utilizing cutting-edge tools and methodologies. Develop and execute comprehensive verification plans for all functional features, based on detailed module level and SoC level testplans. Design and implement ASIC...

Department: IC Design & Development Position Summary: Key Responsibilities Perform front-end verification using UVM methodology Work with Systems and Software engineers on FPGA verification Lead DFT related activities – Scan Insertion, ATPG, Pattern Validation Work with test team in debugging production test issues Help debug & correct any functional...

**Key Responsibilities**: - Develop and implement comprehensive verification plans for IP and SoC levels. - Architect and build reusable testbenches and verification environments using UVM (Universal Verification Methodology). - Create directed and constrained-random tests to identify design bugs. - Develop functional coverage and assertion checks to ensure...

Key Responsibilities: Develop and implement comprehensive verification plans for IP and SoC levels. Architect and build reusable testbenches and verification environments using UVM (Universal Verification Methodology). Create directed and constrained-random tests to identify design bugs. Develop functional coverage and assertion checks to ensure...

Roles & ResponsibilitiesOne of our US Global Semiconductor IC design is growing their design teams in Singapore. Role : Design Verification Engineer (DV)Location : SingaporeExperience : 3 to 7 years. · Technical Requirements:o Expert-level UVM and SystemVerilog verificationo Advanced coverage-driven verification methodologieso Experience with complex SoC...